We have a custom board using a T4240. CodeWarrior is giving us the error message "JTAG chain does not contain any debuggable cores" when we attempt JTAG communication. Not sure if it is in any way related but we also noticed the JTAG IDCODE is 0x1022001D. The documentation says the ID should be 0x0022001D, and that upper 1 is reserved.
Additional information on what might cause either of these two problems or any recommendations one what to focus would be appreciated.
Thanks,
Solved! Go to Solution.
We determined the source of our problems were caused by problems in our reset logic that was not allowing emulator resets to work correctly.
We determined the source of our problems were caused by problems in our reset logic that was not allowing emulator resets to work correctly.
From the connection to SoC point-of-view, I don't see an issue the idcode value. I recommend you to contact the NXP FAE you are assigned, to get some details about the idcode value.
Adrian
Could you try below commands in ccs console and provide the output:
config cc cwtap:<ip_address>
ccs::config_chain testcore
jtag::lock
jtag::reset_tap 1
jtag::reset_tap 1
jtag::scan_in dr 256
jtag::unlock
Adrian
(bin) 1 % config cc cwtap:192.168.1.200
(bin) 2 % ccs::config_chain testcore
(bin) 3 % jtag::lock
(bin) 4 % jtag::reset_tap 1
(bin) 5 % jtag::reset_tap 1
(bin) 5 % jtag::scan_in dr 256
0x000000000000000000000000000000000000000000000000000000001022001D
(bin) 6 % jtag::unlock
(bin) 7 %
Now, the output of:
config cc cwtap:192.168.1.200
ccs::config_chain t4240
display ccs::get_config_chain
ccs::all_run_mode
ccs::reset_to_debug
Adrian
(bin) 1 % config cc cwtap:192.168.1.200
(bin) 2 % ccs::config_chain t4240
T4240: HRESET occurred during transaction
(bin) 3 % display ccs::get_config_chain
Chain Position 0: T4240
(bin) 4 % ccs::all_run_mode
t4240: Debug Mode
(bin) 5 % ccs::reset_to_debug
(bin) 6 %
The chain is not expanding on your board. The reason could be incorrect RCW.
Adrian
What about 0x1022001D? Does IDCODE[3] set indicate a problem?