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IMX6SX eMMC DDR with 8 bits bus problem

Question asked by LPs on Dec 2, 2016
Latest reply on Dec 5, 2016 by LPs

Hi all,

  i'm struggling with my IMX6SX based platform.

I'm using Yocto with kernel 3.14.28+g91cf351.


On my device I monted a eMMC 4.41 compliance and I'm able to make it working with DDR and 4 bits data bus.

I'm trying to enable 8bit data bus but I found out that the kernel fails to request that type of bus and switch back automatically to 4 bits.


Into dts bus-width is correctly set to 8.


I found out that the kernel drvier receive error -84 into data.err when try top read CSD data using function mmc_send_cxd_data (code in mmc_ops.c) called by mmc_init_card (in mmc.c) where the DDR wide bus activiation is performed (around line  1642).


Are there known bugs on this matter?