Hi, Im using i.mx6 based board. u-boot.imx is flashed in SPI NOR Flash. (and Uboot loads the uImage from /boot of the filesystem in the eMMC.). My question is: Does the BootROM code start the uboot as XIP or does the BootROM code copy the uboot from SPI NOR Flash to RAM and start it. If copy to RAM then is it IRAM or DRAM? Im using an iwave rainbow q7 board.
conventional spi-nor connected to ECSPI does not support XIP, regarding RAM -
is it IRAM or DRAM this is defined in Image vector table described in Boot Chapter of RM.
Best regards
igor
igorpadykov I checked. Plugin.S is compiled into Plugin.o and is bundled as part of uboot.imx and "start" of this Plugin.o is kept at boot sector of SPI NOR Flash. So when bootMode switches are set as normal and BootConfig switches are set to boot from SPI NOR Flash, after reset, bootROM code starts and it loads plugin.o to IRAM. This Plugin has DRAM config details for the board. So, it does the DDR initialization, sets the IVT2 with uboot image location and gives back the control to bootROM code. Then the bootROM based on IVT2 loads uboot image to DDR and gives the control to that. This is what my understanding is.
Hi Igor, Thank you for your reply.
I will check the Image vector table to know IRAM or DRAM.
But, can I safely assume that, the uboot code is copied RAM (I or D) and executed without XIP from flash?
Im using i.MX6D rev1.5.
Hi,
At this time I'm assuming you are using an iMX6SX part as you don't specify an exact part, SX is the first with QSPI boot support.
All of what you describe is supported, XIP or non-XIP operation, which can be copied to OCRAM or DDR.
You can find all the details in the RM, which you can get here -
i.MX 6SoloX Family of Applications Processors|NXP
Section 8.6 talks you through the QuadSPI boot process.
Regards
Ross
Hi Ross, Thank you for your reply. Im using i.MX6D rev1.5. I understand both XIP and Non-XIP are supported.
I dont have access to the BootROM code which starts the uboot from SPI NOR.
So, I do not know if the BootROM is running uboot directly from SPI NOR or does it copy to RAM (IRAM or DRAM) and runs it.
So, how to find that out without having BootROM source code?
Hi,
My mistake, as I read the question about XIP I assumed you were referring to QuadSPI NOR on one of our more recent iMX6 parts, but if you are using a 6D then there is no QuadSPI interface on this and as Igor correctly pointed out our conventional SPI NOR interface does not support XIP, apologies for any confusion caused.
Igor has pointed you to the correct place to look, the IVT defines which memory is used (IRAM or DRAM).
Regards
Ross
Thank you Ross.