MC9S08PA4AVTG ADC FIFO SCAN mode

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MC9S08PA4AVTG ADC FIFO SCAN mode

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geremiadesarno
Contributor II

Hello everyone,

 

I've a problem to read the ADC Result with FIFO mode. I need to read AD7,6,5,4,1,0 and I set with the Processor Expert the parameters reported in the picture:

163680_163680.pngADC_SetParameters.png

 

Here the generated Init code:

 

void ADC_Init(void)
{
   /* SYS_SOPT2: ADHWTS=0 */
   clrReg8Bits(SYS_SOPT2, 0x03U); /* Selects the RTC as the source of internal HW trigger */
   /* SYS_SOPT3: FTMCHS=0 */
   clrReg8Bits(SYS_SOPT3, 0x30U); /* Selects the RTC as the source of internal HW trigger */
   /* ADC_APCTL1: ADPC7=1,ADPC6=1,ADPC5=1,ADPC4=1,ADPC3=0,ADPC2=0,ADPC1=1,ADPC0=1 */
   setReg8(ADC_APCTL1, 0xF3U);
   /* ADC_SC4: ??=0,ASCANE=1,ACFSEL=0,??=0,??=0,AFDEP=5 */
   setReg8(ADC_SC4, 0x45U);
   /* ADC_SC3: ADLPC=0,ADIV=0,ADLSMP=0,MODE=2,ADICLK=0 */
   setReg8(ADC_SC3, 0x08U);
   /* ADC_CV: ??=0,??=0,??=0,??=0,CV=0 */
   setReg16(ADC_CV, 0x00U);
   /* ADC_SC2: ADACT=0,ADTRG=0,ACFE=0,ACFGT=0,FEMPTY=1,FFULL=0,??=0,??=0 */
   setReg8(ADC_SC2, 0x08U);
   /* ADC_SC1: COCO=0,AIEN=1,ADCO=1,ADCH=7 */
   setReg8(ADC_SC1, 0x67U);
}

 

Here the code implemeted when the interrupt occurs (COCO==1):

 

ISR( isr_adc)
{
   int i;

   if(ADC_SC2_FFULL) //this control maybe is not necessary as the interrupt occurs
   {
      for(i=0; i<6; i++)
      {
         ADC_Result_Buffer [i] = ADC_R;
         ADC_Channel_Buffer[i] = ADC_SC1_ADCH;
      }
   }
}

 

With the above reading of the result (ADC_Result_Buffer [i] = ADC_R), I obtain only the value of the CH7 (i.e. the initial channel, ADC_Channel_Buffer[i]=7).

How can I do a reading of the other channels?

 

From Datasheet:

"When FIFO is enabled, the result FIFO is read via ADC_RH:ADC_RL. The ADC
conversion completes when the input channel FIFO is fulfilled at the depth indicated by
the AFDEP. The AD result FIFO can be read via ADC_RH:ADC_RL continuously by
the order set in analog input channel ADCH."

 

What is wrong?

 

Thank you!

 

Geremia De Sarno.

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