I'm playing with a custom board having the SSI connected to a SLIC in TDM mode. The SSI has TXC (PCLK) coming from an external oscillator running at 2.048MHz while TXFS (FSYNC) is set to be generated from internal. The SSI documentation is not really clear in case, so wondering to know if it is possible to generate FSYNC with this particular configuration: SSI set in I2S normal mode, synchronous transfers, network mode, TXC taken from external oscillator. Doesn't anyone can give an answer?
I've a similar custom board feeding both TXC and TXFS from internal but this seems not generating stable FSYNC over the time, and the SLIC goes in fault after 2 o 3 days of continuous running due to instable FSYNCs.
Thanks in advance,