Our customer have a question about i.MX6DQ BCH.
Please see chapter 17.6.3 BCH_MODEn in IMX6DQRM Rev.3.
It says "For SLC NAND devices, this value should be programmed to 0 (meaning that the entire page should
consist of bytes of 0xFF." about ERASE_THRESHOLD field.
If we set this value to other than "0" with SLC NAND, what will be happen?