Hello everyone,
I am so happy to be here. I have several questions about T1040 processor. I design a board with T1040 but I do not use from the UDIMM memory like T1040RDB. I must use from T1040RDB SDK for U-Boot kernel and ... .
what changes should I set in SDK with new DDR3?
thanks.
Solved! Go to Solution.
U-boot for the T1040 boards uses SPD for DDR configuring.
See the ddr.zip file in the attachment.
Find the following line in the ddr.h file:
static const struct board_specific_parameters udimm0[] = {
This structure contains the following parameters:
n_ranks, datarate_mhz_high, rank_gb, clk_adjust, wrlvl_start, wrlvl_ctl_2, wrlvl_ctl_3.
Look at the T1023RDB setting in the t102xrdb.h file. Find the CONFIG_SYS_DDR_RAW_TIMING in this file. This setting provides do not use SPD for DDR configuring. See the t102xrdb.h and ddr_t102xrdb.c files for the T102sRDB board from u-boot. See the ddr_raw_timing procedure in the ddr_t102xrdb.c file.
Use similar method for your T1040 board.
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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Have a great day,
Pavel Chubakov
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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Hi dear:
I have met a problem about DIMM。
When I boot 1046 , A NOTICE comes out every seconds like "NOTICE: UDIMM M4DS-AGS1QC0J-BE82".
Have ever met this problem
or Could u plz give me some advances
Thanks
atrqua
Sorry for delay.
Changes in Linux kernel are not needed.
Have a great day,
Pavel Chubakov
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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Thanks Pavel,
Your answer was very helpful, I use the Linux kernel . After u-boot, what changes should I set in Linux kernel with new DDR3?
Thanks again.
U-boot for the T1040 boards uses SPD for DDR configuring.
See the ddr.zip file in the attachment.
Find the following line in the ddr.h file:
static const struct board_specific_parameters udimm0[] = {
This structure contains the following parameters:
n_ranks, datarate_mhz_high, rank_gb, clk_adjust, wrlvl_start, wrlvl_ctl_2, wrlvl_ctl_3.
Look at the T1023RDB setting in the t102xrdb.h file. Find the CONFIG_SYS_DDR_RAW_TIMING in this file. This setting provides do not use SPD for DDR configuring. See the t102xrdb.h and ddr_t102xrdb.c files for the T102sRDB board from u-boot. See the ddr_raw_timing procedure in the ddr_t102xrdb.c file.
Use similar method for your T1040 board.
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------
Have a great day,
Pavel Chubakov
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------