Declaring a fixed link in the Device Tree just prevents the driver
from reading the status of the external PHY. In the current implementation, it
does not affect the on-chip PCS initialization at all, thus if the
other side of the connection does not support autonegotiation type
SGMII, it may fail to complete autoneg phase. Results depend on the
external device logic, T1040 can ignore this, what you actually seem
to observe.
Therefore, the first thing to check is the type of autonegotiation
your FPGA supports, if at all. Required software actions are specified
in Section 31.6 of T1040RM.
Since T1040 is able to receive what it sends when your FPGA is in
loopback mode, the link itself is operable in both directions and
the problem is in the FPGA. You need, however, to check how your
FPGA does this loopback, at the PMA level or at the PCS level. If
the FPGA PCS in involved in the loopback (means, PCS decodes and
re-encodes the code groups it receives), the problem is purely in
the FPGA logic.
On T1040 side, it would be helpful to read the on-chip PCS management
registers described in T1040RM, Section 3.5, but you have to use a
debugger to do that.
Have a great day,
Platon
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