Content originally posted in LPCWare by trueloop on Tue Feb 01 06:01:22 MST 2011
Wat's wrong? I work on LPC1768 and i wrote a routine to receive SSP data over DMA in master mode. All thinks work fine but the job done interrupt from the DMA engine (terminal count interrupt) is always 4 byte to early. I guess that's because the half full receive FIFO (8Byte/2). I need a interrupt only after receive job is complete. Do anyone know a trick to correct this behaviour.
