DMA controller Terminal Count Clear and Error Count Clear problem

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DMA controller Terminal Count Clear and Error Count Clear problem

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by mayur.p.85 on Mon May 27 12:35:23 MST 2013
Hi

I am trying to program DMA channels for handling LED toggle. For doing this I am trying to write Terminal Count Clear (DMACIntTCClear) and Error Count Clear register (DMACIntErrClr) which are write only, which basically fails.
According to user manual I should be able to write from bit 0 to 7 which is failing in my case.

Please see my programming sequence of DMA and let me know If I miss something.
1. Disable NVIC DMA Interrupt bit ( I also tried without it)
2. Enable GPDMA Power Control Register Bit which enables GPDMA Clock (29th bit of PCONP register)
3. Read the DMACEnbldChns and verify that which Channels between 0 and 7 on DMA Controllers are inactive or not.
4. Select one of the DMA Channel which is currently inactive.
5. write to Clear Terminal count and Clear Error count  registers

at step 5 I am failed to write. Its always 0.

Please let me know if I missed something to access those registers.

Regards,
Mayur
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