Content originally posted in LPCWare by Rob65 on Sun May 29 22:50:27 MST 2011
Quote: atomicdog
instead of being spoon fed preprocessed and regurgitated info.
Then why would you look in a data sheet or user manual :eek:
The UM10204 is a regurgitated version of the original document.
The original I2C spec as being referenced in this document was just a chapter in the I2C handbook with all chips that were designed in 'the good old days' when we were still developing everything in TTL logic (the 74LS versions were even not available at that time).
There is a good reason why the UM does not specify the 5V bus level (it's in the manual, section 3.2):
Quote:
Due to the variety of different technology devices (CMOS, NMOS, bipolar) that can be
connected to the I2C-bus, the levels of the logical ‘0’ (LOW) and ‘1’ (HIGH) are not fixed
and depend on the associated level of VDD. Input reference levels are set as 30 % and
70 % of VDD; VIL is 0.3VDD and VIH is 0.7VDD.
But the manual is regurgitated info so here you will find places where they are still not specifying things correctly. In the old days it was only 5V but now it can be anything with the little note you found that 5.5V is absolute maximum.
The lpc111x user manual and data sheet are unclear about 3 pins: P0.0 is not shown to be 5V tolerant as are the SDA/SCL pins. The fact that it is stated that the I2C pins are I2C bus compliant does not state anything about the voltage level that may be applied, just that they have a hysteresis driven input at 30% and 70% of Vdd.
Actually ... since there is no 5V input on the lpc1114 this would mean that the voltage levels are at 0.9 and 2.3 volt and not (as I would expect on a 5V I2C bus) 1.5 and 3.5 Volt ...
Did I not read (in the same section already quoted):
Quote:
Some legacy device input levels were fixed at VIL = 1.5 V and VIH = 3.0 V, but all new devices require this 30 %/70 % specification.
So if NXP specified these I2C pins are "compliant with the I2C spec" this means they are only compliant with a 3.3V I2C bus.
When using 5V I2C devices we are still safe, the UM10204 states that the Vol of a device with Vdd> 2V must be smaller than 0.4V so a low level is always detected - but I would be careful when using 1 MHz or even 400 kHz devices.
I read somewhere, long time ago, that [I]all[/I] I/O pins of the lpc1114 are 5V tolerant but it is not in the datasheet. According to NXP_Europe the I2C pins are also 5V tolerant and that makes the I2C bus 5V tolerant.
This was already answered in another thread where it was clearly stated:
Quote: NXP_Europe
Yes, they are 5 V tolerant.
Still ... there is no document proving this statement.
Haven't I read (and written ...) that there are still problems and the user manuals are still unclear at some points. User manuals are written by people, NXP_Europe, Larry, Zero, I and many other are also just persons.
We all make mistakes so we may all be wrong but I hope that if NXP_Europe or NXP_USA states something in this forum this is somehow verified within the NXP organization giving it a higher level of confidence than statements from me or others.
So if an answer is already given by NXP then why would we try to confuse ourselves by getting more answers - that may lead us the wrong path ...
Rob
