Content originally posted in LPCWare by Brinkand on Wed Jun 16 05:34:45 MST 2010
I am using the LPC1114 for sampling in the middle of a very short ramping pulse (~700ns), where it is imperative that I hit the middle. The CPU is running 48MHz, the ADC prescaler is 10, so ADC clock is 4.363636MHz. I trig the ADC from a timer and so I would expect that the ADC would have a sampling period of 1/4363636Hz = 229ns and additional jitter in the sampling start time of 0 to 229ns.
My test setup generates very consistent results: I measure values which are consistent within 1 LSB ~3.1mV, while my signal is ramping 128mV in 229ns. Based on the measured voltage I find the sampling instans at 276ns after the trigger.
I am happy with the consistent measurements, but also suspicious about better readings than expected. Therefore I suppose my understanding of the ADC input is wrong :confused:.
Any comments are welcome.
