Combination with LandTiger and CMSIS?

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Combination with LandTiger and CMSIS?

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by acinfo32 on Fri Jun 20 12:31:20 MST 2014
Dear All,

I'm new and starting to use the LPCXpresso and the LandTiger board. Can someone explain:

As far as I understood the LPCOpen is based on two parts

1) lpc_chip_175x_6x (processor code)
2) lpc_board_nxp_lpcxpresso_1769 (board code)

The CMSIS is also processor code as far as I understood. Then I have the questions:

1 - What is the relation between the lpc_chip_175x_6x and the CMSIS?
2 - Is there a board support package for the LandTiger board?
3 - How can I start with FreeRTOS and LWIP in combination with the LandTiger and LPCOpen?

With kind regards,

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by acinfo32 on Sat Jun 28 15:31:29 MST 2014
Thank for your answer. I now start to understand.

Every system should have the SystemInit which is called before int main(). In LPCOpen this results in the function calls

Chip_IOCON_SetPinMuxing(LPC_IOCON, pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T));
Chip_SetupXtalClocking();
Chip_SYSCTL_SetFLASHAccess(FLASHTIM_100MHZ_CPU);


But in my CMSIS based project I have

void SystemInit (void)
{
#if (CLOCK_SETUP)                       /* Clock Setup                        */
  LPC_SC->SCS       = SCS_Val;
  if (SCS_Val & (1 << 5)) {             /* If Main Oscillator is enabled      */
    while ((LPC_SC->SCS & (1<<6)) == 0);/* Wait for Oscillator to be ready    */
  }

  LPC_SC->CCLKCFG   = CCLKCFG_Val;      /* Setup Clock Divider                */

  LPC_SC->PCLKSEL0  = PCLKSEL0_Val;     /* Peripheral Clock Selection         */
  LPC_SC->PCLKSEL1  = PCLKSEL1_Val;

  LPC_SC->CLKSRCSEL = CLKSRCSEL_Val;    /* Select Clock Source for PLL0       */

#if (PLL0_SETUP)
  LPC_SC->PLL0CFG   = PLL0CFG_Val;
  LPC_SC->PLL0CON   = 0x01;             /* PLL0 Enable                        */
  LPC_SC->PLL0FEED  = 0xAA;
  LPC_SC->PLL0FEED  = 0x55;
  while (!(LPC_SC->PLL0STAT & (1<<26)));/* Wait for PLOCK0                    */

  LPC_SC->PLL0CON   = 0x03;             /* PLL0 Enable & Connect              */
  LPC_SC->PLL0FEED  = 0xAA;
  LPC_SC->PLL0FEED  = 0x55;
#endif

#if (PLL1_SETUP)
  LPC_SC->PLL1CFG   = PLL1CFG_Val;
  LPC_SC->PLL1CON   = 0x01;             /* PLL1 Enable                        */
  LPC_SC->PLL1FEED  = 0xAA;
  LPC_SC->PLL1FEED  = 0x55;
  while (!(LPC_SC->PLL1STAT & (1<<10)));/* Wait for PLOCK1                    */

  LPC_SC->PLL1CON   = 0x03;             /* PLL1 Enable & Connect              */
  LPC_SC->PLL1FEED  = 0xAA;
  LPC_SC->PLL1FEED  = 0x55;
#else
  LPC_SC->USBCLKCFG = USBCLKCFG_Val;    /* Setup USB Clock Divider            */
#endif

  LPC_SC->PCONP     = PCONP_Val;        /* Power Control for Peripherals      */

  LPC_SC->CLKOUTCFG = CLKOUTCFG_Val;    /* Clock Output Configuration         */
#endif

  /* Determine clock frequency according to clock register values             */
  if (((LPC_SC->PLL0STAT >> 24)&3)==3) {/* If PLL0 enabled and connected      */
    switch (LPC_SC->CLKSRCSEL & 0x03) {
      case 0:                           /* Internal RC oscillator => PLL0     */
      case 3:                           /* Reserved, default to Internal RC   */
        SystemFrequency = (IRC_OSC * 
                          ((2 * ((LPC_SC->PLL0STAT & 0x7FFF) + 1)))  /
                          (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1)    /
                          ((LPC_SC->CCLKCFG & 0xFF)+ 1));
        break;
      case 1:                           /* Main oscillator => PLL0            */
        SystemFrequency = (OSC_CLK * 
                          ((2 * ((LPC_SC->PLL0STAT & 0x7FFF) + 1)))  /
                          (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1)    /
                          ((LPC_SC->CCLKCFG & 0xFF)+ 1));
        break;
      case 2:                           /* RTC oscillator => PLL0             */
        SystemFrequency = (RTC_CLK * 
                          ((2 * ((LPC_SC->PLL0STAT & 0x7FFF) + 1)))  /
                          (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1)    /
                          ((LPC_SC->CCLKCFG & 0xFF)+ 1));
        break;
    }
  } else {
    switch (LPC_SC->CLKSRCSEL & 0x03) {
      case 0:                           /* Internal RC oscillator => PLL0     */
      case 3:                           /* Reserved, default to Internal RC   */
        SystemFrequency = IRC_OSC / ((LPC_SC->CCLKCFG & 0xFF)+ 1);
        break;
      case 1:                           /* Main oscillator => PLL0            */
        SystemFrequency = OSC_CLK / ((LPC_SC->CCLKCFG & 0xFF)+ 1);
        break;
      case 2:                           /* RTC oscillator => PLL0             */
        SystemFrequency = RTC_CLK / ((LPC_SC->CCLKCFG & 0xFF)+ 1);
        break;
    }
  }

#if (FLASH_SETUP == 1)                  /* Flash Accelerator Setup            */
  LPC_SC->FLASHCFG  = (LPC_SC->FLASHCFG & ~0x0000F000) | FLASHCFG_Val;
#endif
}


Where can I find info how to map the CMSIS SystemInit() on the LPCOpen function calls?
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by mc on Mon Jun 23 13:03:58 MST 2014
Hi acinfo32,
That is correct, you do not need to worry about CMSIS. LPCOpen is a full development platform that contains drivers for all peipherals with examples,how to use them.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by acinfo32 on Sat Jun 21 06:54:06 MST 2014
Thanks that clears a lot!

So if I use only the lpc_chip_175x_6x then I don't have to take care about CMSIS because it's then already taken care of (included).

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by TheFallGuy on Sat Jun 21 06:23:18 MST 2014
Lpcopen is effectively a superset of cmsis.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by acinfo32 on Sat Jun 21 05:17:29 MST 2014
Hi MC

Thank you for your answer. Do you also know what is the relation between the lpc_chip_175x_6x and the CMSIS?

I get confused about all the libraries.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by mc on Fri Jun 20 14:49:09 MST 2014
Hi acifo32,
Current LPCOpen http://www.lpcware.com/content/nxpfile/lpcopen-software-development-platform-lpc17xx-packages does not support LandTiger board.
See the porting instructions here at
http://www.lpcware.com/content/faq/how-do-i-port-lpcopen-new-baord

It is explained here in detail.
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