LPC1112FHN33/102 Pin Mux Fail on PIO0_10 / SWCLK

[lpcware]

Content originally posted in LPCWare by clkunde on Tue Dec 03 05:08:18 MST 2013
Dear members,

I'm using LPCXpresso and LPCOPEN 2.0 to develop a new firmware for the LPC1112FHN33/102 IC.

I verified after many tests that the PIN 19 (SWCLK/GPIO0_10/SCK0/CT16B0_MAT2) don't change the function from SWCLK.

In the board_sysinit.c I inserted the line in the Pin Mux table:

{(uint32_t) IOCON_PIO0_10, IOCON_FUNC1}

If I comment or uncomment this line, the effect is the same: the chip don't switch to GPIO function. It is always fixed to the SWCLK Jtag function.

The same don't happen with Pin 25 (SWDIO/PIO1_3). If I change to GPIO function this works appropriately.

What should I do? Somebody had the same problem?

Thank you!

Claudio Kunde

[lpcware]

Content originally posted in LPCWare by nerd herd on Thu Feb 19 14:00:27 MST 2015
Hi clkunde,

Thank you for reporting the solution. This will be investigated and reported to the software team.

[lpcware]

Content originally posted in LPCWare by clkunde on Mon Dec 09 11:41:35 MST 2013
There is an error in iocon_11xx.h file.

The IOCON_PIO0_10 memory map was declared as 0x070.

The correct memory address offset is 0x068, according datasheet.

I'm very frustrated with the LPCOpen. My first project and I found several mistakes on framework...