lpcware

Cortex-M4 and Cortex-M0 code from same bank, is it possible? How much slower is it?

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 18, 2016 by lpcware
Content originally posted in LPCWare by mysepp on Fri Mar 18 04:36:03 MST 2016
Would it in general be possible to place Cortex-M4 and Cortex-M0 code both in same flash bank
e.g. Cortex-M4 code in first half of bank A, Cortex-M0 code in second half of bank A?

Would it be extremely slower than
e.g. compared to Cortex-M4 code in bank A and Cortex-M0 code in bank B?

Is having Cortex-M4 code in bank A and Cortex-M0 code in bank B equal or slower
then putting Cortex-M0 code into SRAM?

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