IAP write problem - using the same memory bank for bootloader and application

[lpcware]

Content originally posted in LPCWare by joaopaulosm on Mon May 30 07:35:08 MST 2016
Hello friends,

I'm having a problem trying to implement a bootloader. The scenario is that follows: a LPC4357 (using only the M4 core) with a bootloader that occupies the first 128 kB of the FLASH A BANK (sectors 0 to 8). The main firmware image is located at an external SPIFI memory. I want to write this image on the following sectors of the on-chip flash (sectors 9 to 14) at the same bank.

The problem is when I try to write the flash using the IAP calls (prepare, erase, prepare, write) the core raises a hardfault. The odd issue is that when I use the exactly same code changing the "destination" to the on-chip flash BANK B, the whole procedure works fine. I've already checked the content of the FLASH B after running the boot loader, and it's fine.

So, is there any issue on using IAP commands affecting the same BANK which your code is running?

Thanks in advance,

[ponalagappan]

Hi, 

I am also having the same problem. I am able to erase/write Flash Bank B sectors. But not able to erase any of the Flash bank A sectors.

__attribute__((section(".RAM")))

I tried with similar commands __attribute__((section("RAMCODESECTION"))). In scatter file i have added the following things:

RW_CODE 0x10080000 OVERLAY 0x0000A000 { ; RW data
*.o (RAMCODESECTION)
}

but i am not getting the exact steps to be followed to make the function run from RAM.

Could anyone please explain  in detail, it will be helpful

Thanks in Advance

[lpcware]

bump

[lpcware]

Content originally posted in LPCWare by DF9DQ on Tue May 31 08:12:37 MST 2016

---

Quote:
I only had to prevent the firmware to be interrupted by the SysTick, because the IRQ handler is in flash.

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That's the culprit!

No need to move the calling functions to RAM. IAP code is in ROM, which already avoids a conflict with flash.

Rolf

[lpcware]

Content originally posted in LPCWare by joaopaulosm on Tue May 31 06:41:10 MST 2016
Thanks for the answers, guys.

I moved the functions that performs the calls to IAP to RAM, using

__attribute__((section(".RAM")))

and now it's working fine. I only had to prevent the firmware to be interrupted by the SysTick, because the IRQ handler is in flash.

Problem solved! Thanks again!

By the way, I'm not from Portugal.

Regards from Brasil!

[lpcware]

Content originally posted in LPCWare by HCTEK on Tue May 31 04:01:42 MST 2016
Hi,

the 6.4.5.6 section of the User Manual: "The on-chip flash memory is not accessible during erase/write operations." And also in section 6.8: " The flash memory is not accessible during a write or an erase operation." It supports the vtw.433e reply.

You are using the bank B for other purpose? Why not the boot loader in there?



Cumpz

João és PT? ;)

[lpcware]

Content originally posted in LPCWare by joaopaulosm on Mon May 30 11:57:14 MST 2016
Thanks vtw.433e !

I've been looking for this information in the Reference Manual and in some application notes, but it is not so clear.

But how should I do this? I have to put all the boot loader code to run on RAM or only the functions that calls the IAP entry? Or should I copy the IAP code which is at ROM to the RAM?

I'm using a layered architecture to access the hardware, so it is not so easy to re-map all the functions and routines to RAM. And I'm also using the GNU ARM GCC toolchain, with a GNU linker script, which is not so intuitive as using IAR or KEIL.

Thanks in advance for your help. 

[lpcware]

Content originally posted in LPCWare by vtw.433e on Mon May 30 09:19:38 MST 2016
You must run iap from ram. You cannot program the flash while trying to run from the same bank. This is documented