lpcware

highest recommended periodic interrupt frequency

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by jonotree on Fri Oct 10 07:10:00 MST 2014
Hi there,

I'm trying to write a bit-bashing based spi routine (the spi peripheral on my lpc is taken already), and am planning to use a periodic timer-based interrupt to toggle a variable which will represent my spi clock signal.

I'm aware of the issue of having an interrupt frequency which is too high, such that the processor is always in an interrupt so it has virtually no time to run the actual program.

Are there any guidelines or good rules of thumb when defining a sensible limit for interrupt frequency in relation to actual system clock speed?

My system clock speed is 120 MHz (found by checking 'PeripheralClock' variable in system_LPC177x_8x.c) and I would like an interrupt frequency of 5 MHz.

With my timer presacaled to give this interrupt frequency, the program get stuck due to the issue described above. I know I should basically lower the interrupt frequency a lot, but I'm curious as to whether there is a way to get a ballpark type figure if you know your system clock frequency. Or if there are any helpful metrics you can use to get an idea?

Thanks in advanced
Jonathan  

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