Content originally posted in LPCWare by wellsk on Thu Mar 07 10:02:00 MST 2013
Are you using the PLL to drive the system clock (base clock for CPU divider and peripherals)? And are you using the 175x/6x or 177x/8x family?
Changing the PLL while the system is actively using it isn't something I would recommend. It might work, but changing the PLL rate usually has some delay involved and can stall or cause problems with devices that use that clock (for example,
If you really need to change the PLL rate, it's best to switch the system clock to a safe clock (main oscillator or IRC), then adjust the PLL and wait for PLL lock, and then switch the system clock back to the PLL. Because the PLL rate changed, any peripherals you use will need to be re-setup for the new clock.
A better alternative would be to keep the PLL clock rate at 80MHz and adjust the CPU clock divider. It won't get you an exact 30MHz, but you can easily get 40MHz or 26.67MHz. You can also trying bumping up the PLL rate to 120MHz and using CPU dividers of 2 and 4 for fast switching between 60Mhz and 30MHz. For the 175x/6x family, the peripheral clock rate is based on the CPU rate and it's divider, while the 177x/8x peripheral clock is based directly on the system clock (ie, PLL out) and isn't altered by the CPU divider.
