SPI slave on LPC1343

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by jookie on Mon Apr 22 02:00:02 MST 2013


just 2 quick (dumb) questions :)
- 14.7.5 SSP Clock Prescale Register -- 'In Slave mode, the SSP clock rate provided by the master must not exceed 1/12 of the SSP peripheral clock...' -- does this mean that when my LPC is running on 72 MHz, then maximum clock (SCK) in SPI slave mode can be 6 MHz? (~ 6 Mbit, 0.75 MB/s)

- does the SPI CS line have to toggle (go H and L) for every received byte in SPI slave mode? (found somewhere here, on forum).