During debug P4080, I encounted a ECC related issue.
If I enable ECC in the DDR paramenters, then when I read DDR, will hang.
If disable ECC, read will not cause hang, but the data is error.
My questions is how to handle this kind of issue? is it caused by unsuitable parameters of DDR or hardware design, like PCB.
Can it be resolved by configure DDR parameters? How to? Could you please help to give some suggestions?
Thanks a lot!
> is it caused by unsuitable parameters of DDR or hardware design, like PCB.
Both factors are possible.
It is required to doublecheck the SDRAM PCB design referring the AN3940 - Hardware and Layout Design Considerations for DDR3 SDRAM Memory Interface:
http://cache.nxp.com/files/32bit/doc/app_note/AN3940.pdf?fsrch=1&sr=1&pageNum=1
> Can it be resolved by configure DDR parameters?
It is recommended to use the DDR Memory Validation Tool of the QorIQ Configuration and Validation Suite: