Already according to your configuration file, now how can I do to detect PLL1 output 160MHz? Such as bus clock output pin, with an oscilloscope measurement

[DELPHI_Eric]

Already according to your configuration file, now how can I do to detect PLL1 output 160MHz? Such as bus clock output pin, with an oscilloscope measurement

[PetrS]

Hi,

Set the pad for the CLKOUT function within SIUL as

SIUL2.MSCR[22].R = 0x22800001;              // PB6 as CLK_OUT (on EVB it is B9)

Then confingure Auxiliary clock selector 6 to select PLL1 with proper divider, eg.

MC_CGM.AC6_SC.R = 0x04000000;    // Select PLL1 for auxiliary clock 6

MC_CGM.AC6_DC0.R = 0x80010000;    // CLKOUT0 : Enable aux clk 6 div by 2 … (80 MHz)

BR, Petr

[DELPHI_Eric]

Thanks,but I mean, how to measure the MCU output pin to determine whether it is configured to 160MHz？

[PetrS · Accepted solution]

Use the oscilloscope. But most probably you will see nothing or some kind of sine wave with low amplitude, because the pad is not strong and fast enough to toggle with such high rate.

That’s why you should divide down the frequency on the output pin (CLKOUT).

Petr

[DELPHI_Eric]

Thanks Peter!