Hi Ko-hey,
I confirmed it further for you. So sorry to bring the improper reply for you yesterday. Our AE expert give update reply:
For design, it can support DDR3L.
But we never validate DDR3L before.
About the pin mux you can refer to the section 32.4.5 LPDDR2 and DDR3 pin mux mapping in IMX6SLRM.pdf.
Have a great day,
Dan
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