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T1040RM datasheet error SerDes Register Map description

Question asked by Stefan Lange on Feb 1, 2016
Latest reply on Feb 1, 2016 by Stefan Lange

Hello NXP / Freescale team,

 

in QorIQ T1040 Reference Manual, Rev. 1, 08/2015 I noted that in register

General Control Register 1 - Lane n (SerDes_LNnGCR1)

the fields

REIDL_EX_SEL

and

REIDL_ET_SEL

are displayed as two-bit fields in the regster overview page 1757.

 

However in the coming

SerDes_LNnGCR1 field descriptions page 1758

the recommended values are stated as three-bit values:

PCIe: 011 (2.5 Gbaud)

SGMII-1G: 011 (1.25 Gbaud)

SGMII-2.5G: 000 (3.125 Gbaud)

 

Probably a mistake?

 

Best regards,

Stefan Lange

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