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mipi_dsi IRQ status0:0x0, status1:0x80

Question asked by xueyuan bai on Jan 17, 2016
Latest reply on Apr 24, 2017 by Kunal Kulshrestha

Hello community,

 

    I have a question about MIPI DSI phy.

    At first, our imx6solo board with mipi display himax8369 works well.

 

    Now we have a mipi-display with himax8363 as the controler IC, and their FAE tells us the controller IC cannot run with too high mipi-clock signal, 150MHz at the maximum.

    So when we try to  change

static struct mipi_lcd_config lcd_config = {

.virtual_ch     = 0x0,

.data_lane_num = HX8369_TWO_DATA_LANE, // HX8369_ONE_DATA_LANE

.max_phy_clk = HX8369_MAX_DPHY_CLK, // which is 800MHz

.dpi_fmt     = MIPI_RGB888, /* original */

};

 

to the configuration below

static struct mipi_lcd_config lcd_config = {

.virtual_ch     = 0x0,

.data_lane_num = HX8369_TWO_DATA_LANE, // HX8369_ONE_DATA_LANE

.max_phy_clk = 200,

.dpi_fmt     = MIPI_RGB888, /* original */

};

 

there comes too many mipi dsi interrupts during the booting process after that change as follows,

 

mxc_mipi_dsi mxc_mipi_dsi: i.MX MIPI DSI driver probed

MIPI DSI driver module loaded

mxc_sdc_fb mxc_sdc_fb.0: register mxc display driver mipi_dsi

mxc_mipi_dsi mxc_mipi_dsi: dphy_pll_config:div 0x44.

mxc_mipi_dsi mxc_mipi_dsi: dphy_pll_config: i 20 max_phy_clk 200.

mxc_mipi_dsi mxc_mipi_dsi: MIPI DSI LCD setup.

mxc_mipi_dsi mxc_mipi_dsi: buf[0]=0x6383ffb9

mxc_mipi_dsi mxc_mipi_dsi: buf[0]=0x073081b1

mxc_mipi_dsi mxc_mipi_dsi: buf[1]=0x12070430

mxc_mipi_dsi mxc_mipi_dsi: buf[2]=0x003f423a

mxc_mipi_dsi mxc_mipi_dsi: buf[0]=0x0000703a

mxc_mipi_dsi mxc_mipi_dsi: buf[0]=0x000001b3

mxc_mipi_dsi mxc_mipi_dsi: buf[0]=0x721208b4

mxc_mipi_dsi mxc_mipi_dsi: buf[1]=0x54030612

mxc_mipi_dsi mxc_mipi_dsi: buf[2]=0x00004e03

mxc_mipi_dsi mxc_mipi_dsi: buf[0]=0x001000bf

mxc_mipi_dsi mxc_mipi_dsi: buf[0]=0x00000eb6

mxc_mipi_dsi mxc_mipi_dsi: buf[0]=0x000003cc

mxc_mipi_dsi mxc_mipi_dsi: buf[0]=0x008000e0

mxc_mipi_dsi mxc_mipi_dsi: buf[1]=0x05a7138c

mxc_mipi_dsi mxc_mipi_dsi: buf[2]=0x17d4100d

mxc_mipi_dsi mxc_mipi_dsi: buf[3]=0x03071655

mxc_mipi_dsi mxc_mipi_dsi: buf[4]=0x8c008000

mxc_mipi_dsi mxc_mipi_dsi: buf[5]=0x0d05a713

mxc_mipi_dsi mxc_mipi_dsi: buf[6]=0x5517d410

mxc_mipi_dsi mxc_mipi_dsi: buf[7]=0x00030716

mxc_mipi_dsi mxc_mipi_dsi: buf[0]=0x00000011

mxc_mipi_dsi mxc_mipi_dsi: buf[0]=0x00000029

backlight mipid-bl: mipid backlight bringtness:255.

mxc_mipi_dsi mxc_mipi_dsi: mipi_dsi_set_mode: cmd_mode 0x0.

mxc_mipi_dsi mxc_mipi_dsi: mipi_dsi IRQ status0:0x0, status1:0x80!

mxc_mipi_dsi mxc_mipi_dsi: mipi_dsi IRQ status0:0x0, status1:0x80!

mxc_mipi_dsi mxc_mipi_dsi: mipi_dsi IRQ status0:0x0, status1:0x80!

mxc_mipi_dsi mxc_mipi_dsi: mipi_dsi IRQ status0:0x0, status1:0x80!

mxc_mipi_dsi mxc_mipi_dsi: mipi_dsi IRQ status0:0x0, status1:0x80!

mxc_mipi_dsi mxc_mipi_dsi: mipi_dsi IRQ status0:0x0, status1:0x80!

mxc_mipi_dsi mxc_mipi_dsi: mipi_dsi IRQ status0:0x0, status1:0x80!

mxc_mipi_dsi mxc_mipi_dsi: mipi_dsi IRQ status0:0x0, status1:0x80!

mxc_mipi_dsi mxc_mipi_dsi: mipi_dsi IRQ status0:0x0, status1:0x80!

mxc_mipi_dsi mxc_mipi_dsi: mipi_dsi IRQ status0:0x0, status1:0x80!

mxc_mipi_dsi mxc_mipi_dsi: mipi_dsi IRQ status0:0x0, status1:0x80!

mxc_mipi_dsi mxc_mipi_dsi: mipi_dsi IRQ status0:0x0, status1:0x80!

mxc_mipi_dsi mxc_mipi_dsi: mipi_dsi IRQ status0:0x0, status1:0x80!

mxc_mipi_dsi mxc_mipi_dsi: mipi_dsi IRQ status0:0x0, status1:0x80!

 

And I checked the reference manual, it says,

 

the 0x80 corresponds to bit7 dpi_pld_wr_err in 42.6.19 Interrupt status register 1 (MIPI_DSI_ERROR_ST1)

During a DPI pixel line storage the payload FIFO went full and data stored is corrupted.

 

Any ideas on this question?

Any guidance will be appreciated.

 

Thank you in advance.

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