Time required to become TDRE=1 once data copied to SCI0DRL

[Deepak1]

Hi !

Device : MC9S12G

Bus clock = 24 MHz

I want to know is how to calculate the time required to become TDRE = 1 of SCISR1 register once the data is copied to SCI0DRL register ?

Example:

SCI0DRL = 0x12;

while(!(SCI0SR1 & 0x80));

Below is the my code which is taking around 4msec to exit from the function

Tx_Data_Length = 8;

void  Tx_Data (unsigned char *Tx_Data_Buffer,unsigned char Tx_Data_Length)

{

     unsigned char Data_Counter;

    for (Data_Counter = 0; Data_Counter < Tx_Data_Length; Data_Counter++)

     {

        SCI0DRL = Tx_Data_Buffer[Data_Counter];                     

        while(!(SCI0SR1 & 0x80));

    }

  SCI0DRL = checksum(&Tx_Data_Buffer[0], Pid,Len);                     

  while(!(SCI0SR1 & 0x80));

}

Below code is the MCU Clock & SCI registers settings .

/******************** MCU Clock Registers Initialization ******************************************/

void MCU_init(void)

{ 

  /*  System clock initialization */

  /* CPMUPROT: PROT=0 */

  /* Disable protection of clock configuration registers */

  CPMUPROT = 0x26U;                   

  /* CPMUCLKS: PSTP=0 */

  CPMUCLKS &= (uint8)~(uint8)0x40U;                    

  /* CPMUCLKS: PLLSEL=1 */

  /* Enable the PLL to allow write to divider registers */

  CPMUCLKS |= (uint8)0x80U;   

  /*

  CPMUSYNR:

  VCOFRQ1=0,VCOFRQ0=0,SYNDIV5=0,SYNDIV4=1,

  SYNDIV3=0,SYNDIV2=1,SYNDIV1=1,SYNDIV0=1

  */

  /* Set the multiplier register */

  CPMUSYNR = 0x17U;

  /* Set the post divider register */ 

  /* CPMUPOSTDIV: POSTDIV4=0,POSTDIV3=0,POSTDIV2=0,POSTDIV1=0,POSTDIV0=0 */

  CPMUPOSTDIV = 0x00U;

  /* CPMUPLL: FM1=0,FM0=0 */

  /* Set the PLL frequency modulation */

  CPMUPLL = 0x00U;                    

  while(CPMUFLG_LOCK == 0U)

  {         

     /* Wait until the PLL is within the desired

        tolerance of the target frequency */

  }

  /* CPMUPROT: PROT=0 */

  /* Enable protection of clock configuration registers */

  CPMUPROT = 0x00U;                   

  /* CPMUCOP: RSBCK=0,WRTMASK=0 */

  CPMUCOP &= (uint8)~(uint8)0x60U;                    

  /* Common initialization of the CPU registers */

  /* WOMS: WOMS1=0 */

  WOMS &= (uint8)~(uint8)0x02U;                    

  /* CPMUINT: LOCKIE=0,OSCIE=0 */   

  CPMUINT &= (uint8)~(uint8)0x12U;                    

  /* CPMULVCTL: LVIE=0 */

  CPMULVCTL &= (uint8)~(uint8)0x02U; 

  /* IRQCR: IRQEN=0 */

  IRQCR &= (uint8)~(uint8)0x40U;  

} /*MCU_init*/

/******************** SCI Registers Initialization ******************************************/

void Lin_Init(void){ 

  /* SCI0CR2: TIE=0,TCIE=0,RIE=0,ILIE=0,TE=0,RE=0,RWU=0,SBK=0 */

  SCI0CR2 = 0x00U;                     /* Disable the SCI0 module */

  (void)(SCI0SR1 == 0U);               /* Dummy read of the SCI0SR1 registr to clear flags */

  SCI0DRL = 0U;                        /* Dummy write to the SCI0DRL registr to clear flags */

  /* SCI0SR2: AMAP=0,TXPOL=0,RXPOL=0,BRK13=1,TXDIR=0,RAF=0 */

  SCI0SR2 = 0x04U;                                     

  /* SCI0BD: IREN=0,TNP1=0,TNP0=0,SBR12=0,SBR11=0,SBR10=0,SBR9=0,SBR8=0,SBR7=0,SBR6=1,SBR5=0,SBR4=0,SBR3=1,SBR2=1,SBR1=1,SBR0=0 */

  SCI0BD = 0x4EU;                                                       

  /* SCI0CR1: LOOPS=0,SCISWAI=0,RSRC=0,M=0,WAKE=0,ILT=0,PE=0,PT=0 */

  SCI0CR1 = 0x00U;                                     

  /* SCI0SR2: AMAP=1 */

  SCI0SR2 |= (uint8)0x80U;     /* Switch to the alternative register set */

  /* SCI0ASR1: RXEDGIF=1,BERRV=0,BERRIF=1,BKDIF=1 */

  SCI0ASR1 = 0x83U;                    /* Clear interrupt flags */

  /* SCI0ACR1: RXEDGIE=0,BERRIE=0,BKDIE=0 */

  SCI0ACR1 = 0x00U;                                     

  /* SCI0ACR2: BERRM1=0,BERRM0=0,BKDFE=0 */

  SCI0ACR2 = 0x00U;                                     

  /* SCI0SR2: AMAP=0 */

  SCI0SR2 &= (uint8)~(uint8)0x80U; /* Switch to the normal register set */

  /* SCI0CR2: TIE=0,TCIE=0,RIE=1,ILIE=0,TE=1,RE=1,RWU=0,SBK=0 */

  SCI0CR2 = 0x2CU;     

}

Regards,

Deepak

Message was edited by: Deepak Omanna

[lama]

There are two bit TC and TDRE

Let’s consider transmition format 1+8+1 = 10 bits (start+data+stop)

SCIDRL is usually translated in the CW to ASM as sequence of command LDAA, STAA (or you can use MOVB or MOVW). I will take moment after STAA as a start point.

Next thing we have to take into consideration is that transmit is done in sequence of two buffers:

Transmit data buffer (TDR), and sending data buffer (SDR) which are in serial connection. Then we should think about two cases:

1. 1) As soon as you write into TDR and there is no transmition in progress then the data are immediately tranfered into SDR and TDR is empty.
2. 2) As soon as you write into TDR and there is some transmition in progress then the data are shifted from TDR to SDR after TC (transmittion complete) flag is set.

TC is set after time:

t_TC = 1/SCI_baud_rate * 10(bits)

Now, considering items presented above we can say:

1. 1) TDRE is set immediately if there is no transmition in progress
2. 2) TDRE is set on the basis in which moment of given period t_TC we will write next data into the SCIDRL(TDR)

Best Regards, Ladislav

[Deepak1]

Hi !

Here my baud rate is 19200 & sending 8-bytes of data once request send by master.

And as per the using formula given above it should take  40 usec or 50 usec, but why it is taking around 4msec ? The time 4msec I measured at the TXD pin of the micro-controller.

Is there any other register configuration setting that I am missing ?

[kef2 · Accepted solution]

• but why it is taking around 4msec ?

Most likely because you are swapping the order of flags register read operation and data register write operation. This order is highly important, read flags register first, then write data register.

[Deepak1]

Hi !

Now it is taking 3.6 msec after Swapping the order,

        while(!(SCI0SR1 & 0x80));

        SCI0DRL = Tx_Data_Buffer[Data_Counter];

Still 3.6 msec is too high.

[Deepak1]

Hi !

Waiting for any reply.

[kef2]

Hm, I trusted your calculations above:

• Here my baud rate is 19200 & sending 8-bytes of data once request send by master.
• And as per the using formula given above it should take  40 usec or 50 usec, but why it is taking around 4msec

But one byte at 19200bps takes not 40usec, but  10/19200 = 521 us. And 8 bytes should take a little longer than 4ms.

Edward