I'm capturing video from CSI and I'm wondering how to determine values for NPB and IPUx_SMFC_BS.
Could you advise how to:
- Minimize contentions at DDR from IPU and CPU master access.
- Make the best use of DDR bandwidth.
As far as I tested, the bigger the values, the more room for CPU to use DDR.
The DDR is configured in CL 8, 8 burst, 2 clock overhead, which should transfer 64byte in 14 clocks.
The CSI video input is: