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SMP configuration in imx6dual SoC

Question asked by Dilshad Alam on Sep 16, 2015
Latest reply on Oct 6, 2015 by Dilshad Alam
Branched to a new discussion

We are using the dual core iMX6 chip on our target board running Freescale Kernel 3.14.28).

We are trying to enable both the cores but unable to detect the second core.

 

I have done following modification in defconfig.

CONFIG_GENERIC_SMP_IDLE_THREAD=y

CONFIG_HAVE_SMP=y

CONFIG_SMP=y

CONFIG_SMP_ON_UP=y

CONFIG_PM_SLEEP_SMP=y

 

and imxdl.dtsi is by default has cpu@1 nodes enabled.

 

cpu@1 {

 

  compatible = "arm,cortex-a9";

  device_type = "cpu";

  reg = <1>;

  next-level-cache = <&L2>;

  };

 

Please find the Kernel logs:-  These logs does not come if don't enable CONFIG_SMP

 

[    0.082439] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000

[    0.088239] Setting up static identity map for 0x10427398 - 0x104273f0

[    0.100426] Brought up 1 CPUs

[    0.103494] SMP: Total of 1 processors activated.

[    0.108341] CPU: All CPU(s) started in SVC mode.

 

cat /proc/cpuinfo

processor       : 0

model name      : ARMv7 Processor rev 10 (v7l)

Features        : swp half thumb fastmult vfp edsp neon vfpv3 tls vfpd32

CPU implementer : 0x41

CPU architecture: 7

CPU variant     : 0x2

CPU part        : 0xc09

CPU revision    : 10

Hardware        : Freescale i.MX6 Quad/DualLite (Device Tree)

Revision        : 0000

Serial          : 0000000000000000

 

Let me know if i am missing anything.

 

Thanks,

Dilshad

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