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How to set iomux for GPIO operation?

Question asked by Tim Ellis on Apr 30, 2015
Latest reply on May 5, 2015 by Andrew Dyer

I'm trying to find a simple example of how to set the iomux in a kernel module to enable GPIO operation on a given pin.

 

For example, I want to use GPIO3_IO01. I see that it's ALT5 on the EIM_DA1 pad. I've found that the Pad Mux Register is IOMUXC_SW_MUX_CTL_PAD_EIM_AD01.

 

However, when I try to set this register with a writel(), I get an error that "Unable to handle kernel paging request at virtual address..."

 

Obviously I'm missing something in the way I am setting this up. Can someone please enlighten me with a simple example of code that would properly set the pad mux register to allow me to use the GPIO?

 

Thank you.

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