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Need iMX6S to operate in 'Smart' PMIC mode

Question asked by Brandon Hallen on Apr 28, 2015
Latest reply on Apr 28, 2015 by igorpadykov

We're setting up a board support package for a custom iMX6S board using Yocto (based on dizzy - community).  As part of the design we're using Freescale's MMPF0200F0AEP PMIC largely so we can enter a low power sleep mode.  The iMX6 needs to issue a pulse from the PMIC_ON_REQ pin the to PMIC PWRON pin to put itself to sleep.

 

What I'm having a hard time figuring out is the reset behavior of the SNVS_LPCR register.  According to the reference manual (p4965-6), the reset value should be 0x00000000.  When I start U-Boot (Freescale V2014.10), the value is 0x00000020.  If I try to clear it, the value doesn't change:

 

uboot> md 020CC038 1

020cc038: 00000020                                ...

uboot> md.l 020CC038 1

020cc038: 00000020                                ...

uboot> mw.l 020CC038 00000000 1

uboot> md.l 020CC038 1

020cc038: 00000020                                ...

uboot>

 

What's going on?  I've search u-boot high and low for code that might modify this register but I've found nothing.  There are some privileged registers in the SNVS section but this doesn't seem to be one of them.  Is there a clock I need to turn on?  I've tried using devmem (busybox) from Linux with the same result.

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