I am using QorIQ P1013 processor in Linux (3.10.18), where my NVRAM Chip is connected via SPI interface.
The NVRAM Write timings calculated using Chipscope are as follows:
1 byte write time with 1 MHz SPI clock = 310 - 330 usec (approx)
1 byte write time with 10 MHz SPI clock = 260 - 280 usec (approx)
As per Chipscope calculated timing, the actual write operation are performed in correct span of time as:
For 1 MHz SPI Clock :
8 bit SPI write enable = 9 usecs (approx)
40 bit message (opcode + address + data) write = 48 usecs (approx)
For 10 MHz SPI Clock :
8 bit SPI write enable = 800 nsecs (approx)
40 bit message (opcode + address + data) write = 4 usecs (approx)
But it takes 125 - 130 usecs for wait in write completion in both 1 MHz and 10 MHz clock.
I am using standard Linux SPI driver interface where SPI write performs the following sequence of operations:
The spi_sync() function uses kernel task wait_for_completion() to hold the state for write completion.
As per my test results, this consumes the wait time of 125 - 130 usecs, thus adding an extra 250 - 260 usecs time in SPI write for 1 byte data.
Any suggestion or feedback to this will help in optimizing my timing requirements.
Thanks in advance,