I am working on C90LC D-Flash of MPC560xB to implement a customized solution for EEPROM emulation.
I'am testing my product behavior after a power loss while there was a flash operation ongoing.
- If the power off occurs during an erase operation, at the next power on I get a core exception (IVOR2) at the first access to the corrupted flash address.
- If the power off occurs during a writing operation I have no exception at the next power on.
My question is :
Is it normal that there is no core exception if the writing operation is suspended by a shutdown ?
Knowing that I forced the shutdown at different points of writing operation (before and after setting and clearing MCR-EHV & MCR-PGM).