the meaning of " Chip select togging"

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the meaning of " Chip select togging"

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Fan_xy
Contributor III

Hello,

When config the SPI component on CW-PE,  there is a choice "Chip select toggling" . what's the meaning ?

And on matter  i choose yes or no , the register "SPIx_PUSHR->CONT" is "0" .

And if I want the PCS signal (SPI_MASTER) is all ways  low , where and how should I config ?

Thanks

Linda

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marek_neuzil
NXP Employee
NXP Employee

Hi Linda,

The Chip select toggling property is used for enabling/disabling of continuous selection format (CONT bit in the SPIx_PUSHR register).

When the CONT bit = 0 (Chip select toggling property is set to yes), the DSPI drives the asserted Chip Select signals to their idle states in between frames. The idle states of the Chip Select signals are selected by the PCSISn bits in the MCR. The following timing diagram is for two four-bit transfers with CPHA = 1 and CONT = 0.

SPI_example of non-continuous format.png

See the reference manual of the derivative, chapter SPI (DSPI) for more details, e.g. K60P144M150SF3RM.

In your case (SPIx_PUSHR registrer, CONT = 0) the PCSx signal should be toggled. Please, check the setting of the PCSx pin, iddle state and the delay between transwers (Delay between chars property) of SPIMaster_LDD component in your project.

You can also see that the CONT bit settings is initialized in the Init method of the SPIMaster_LDD component, the corresponfing bit (bit number 31) of the DeviceDataPrv->TxCommand:

LDD_TDeviceData* SM1_Init(LDD_TUserData *UserDataPtr)
{
  /* Allocate LDD device structure */
  SM1_TDeviceDataPtr DeviceDataPrv;

  /* {Default RTOS Adapter} Driver memory allocation: Dynamic allocation is simulated by a pointer to the static object */
  DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC;
  DeviceDataPrv->UserData = UserDataPtr; /* Store the RTOS device structure */
  /* Interrupt vector(s) allocation */
  /* {Default RTOS Adapter} Set interrupt vector: IVT is static, ISR parameter is passed by the global variable */
  INT_SPI0__DEFAULT_RTOS_ISRPARAM = DeviceDataPrv;
DeviceDataPrv->TxCommand = 0x00100000U; /* Initialization of current Tx command */
  DeviceDataPrv->ErrFlag = 0x00U;      /* Clear error flags */

  . . .

This  value of TxCommand is used in the itnerrupt routine when the value of the PUSHR is written, see the source code below:

PE_ISR(SM1_Interrupt)
{
    . . .

    . . .
  if ((StatReg & SPI_PDD_TX_FIFO_FILL_INT_DMA) != 0U) { /* Is HW buffer empty? */
    if (DeviceDataPrv->OutSentDataNum < DeviceDataPrv->OutDataNumReq) { /* Is number of sent characters less than the number of requested incoming characters? */
      DeviceDataPrv->OutSentDataNum++; /* Increment the counter of sent characters. */
      SPI_PDD_WriteMasterPushTxFIFOReg(SPI0_BASE_PTR, (uint32_t)(*((uint8_t *)DeviceDataPrv->OutDataPtr++) | DeviceDataPrv->TxCommand)); /* Put a character with command to the transmit register and increment pointer to the transmitt buffer */
      if (DeviceDataPrv->OutSentDataNum == DeviceDataPrv->OutDataNumReq) {
        DeviceDataPrv->OutDataNumReq = 0x00U; /* Clear the counter of characters to be send by SendBlock() */
        SM1_OnBlockSent(DeviceDataPrv->UserData);
      }
    } else {
      SPI_PDD_DisableDmasInterrupts(SPI0_BASE_PTR, SPI_PDD_TX_FIFO_FILL_INT_DMA); /* Disable TX interrupt */
    }
    SPI_PDD_ClearInterruptFlags(SPI0_BASE_PTR,SPI_PDD_TX_FIFO_FILL_INT_DMA); /* Clear Tx FIFO fill flags */
  }
}

Please note that this code depends on the settings of the SPIMaster_LDD component (I have used the default settings with interrupts service enabled).

Best Regards,

Marek Neuzil


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trytohelp
NXP Employee
NXP Employee

Hi Linda,

Please can you provide us more information?

What is the processor used ?

What is the tool version used ?

        - CW classic,

        - CW Eclipse,

        - Driver suite.


Have a great day,
Pascal Irrle

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Fan_xy
Contributor III

Hi Pascal,

CW10.6  ,  SPI_MASTER component ,  TWR-k60

Thank you !

Linda

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