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i.MX6DQ MMDC self-refresh mode and DDR clock.

Question asked by Satoshi Shimoda on Oct 21, 2014
Latest reply on Oct 23, 2014 by Artur Petukhov

Hi community,


Our partner have a question about i.MX6DQ DDR3.

The partner want to keep DDR3 clock output, but in default DDR3 clock is stop for lower power consumption.

Please see "Power saving" feature in Table 44-1 of IMX6DQRM (Rev.2).

It says "• During self-refresh mode the clock (CK) that is driven to the DDR device will be gated for power saving." and "• In automatic self-refresh, the internal operating clock will be gated for power saving."

So I guess DDR3 clock is kept if user prevent entering to self-refresh mode.

Is this correct?


If correct, would you let me know how to disable auto self-refresh mode?



Best Regards,

Satoshi Shimoda