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iMX6SDL CCM_CBCMR GPU2D_CORE_SEL value 0b11

Question asked by Michel Verhagen on Aug 31, 2014
Latest reply on Sep 2, 2014 by Michel Verhagen

iMX6SDL CCM_CBCMR GPU2D_CORE_SEL value 0b11 is listed as "derive clock from Reserved PFD" but out of reset this is set.

 

Is this another error in the RM and should this be PLL2_PFD2 (396 MHz) (same as in the iMX6DQ), or is this option invalid and shouldn't be used for iMX6SDL?

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