i.MX6 - LDO Bypass anatop regulator in Linux 3.10.17_1.0.0-GA release

[Ansari]

Dear sir/madam,

We are using imx6Q sabresd platform for our development with Linux

3.10.17_1.0.0-GA BSP.

http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/?h=imx_3.0.35_4.1.0&id=868d21a7fc...

In above link shows that, the anatop "reg_pu" value is set to 0x1F which

is linux-3.0.35 kernel.

    @@ -81,6 +101,21 @@ void mx6_cpu_regulator_init(void)

    regulator_set_voltage(cpu_regulator,

    cpu_op_tbl[0].cpu_voltage,

    cpu_op_tbl[0].cpu_voltage);

    + if (enable_ldo_mode == LDO_MODE_BYPASSED) {

    + /*digital bypass VDDPU/VDDSOC/VDDARM*/

    + reg = __raw_readl(ANADIG_REG_CORE);

    + reg &= ~BM_ANADIG_REG_CORE_REG0_TRG;

    + reg |= BF_ANADIG_REG_CORE_REG0_TRG(0x1f);

    + reg &= ~BM_ANADIG_REG_CORE_REG1_TRG;

    + reg |= BF_ANADIG_REG_CORE_REG1_TRG(0x1f);

    + reg &= ~BM_ANADIG_REG_CORE_REG2_TRG;

    + reg |= BF_ANADIG_REG_CORE_REG2_TRG(0x1f);

    + __raw_writel(reg, ANADIG_REG_CORE);

    + /* Mask the ANATOP brown out interrupt in the GPC. */

    + reg = __raw_readl(gpc_base + 0x14);

    + reg |= 0x80000000;

    + __raw_writel(reg, gpc_base + 0x14);

    + }

    clk_set_rate(cpu_clk, cpu_op_tbl[0].cpu_rate);

But with reference of Linux 3.10.17_1.0.0-GA BSP, During the LDO bypass

the "reg_pu" value is not set to 0x1F as mentioned below. Please clarify.

file:u-boot-imx/arch/arm/cpu/armv7/mx6/soc.c

void set_anatop_bypass(void)

{

struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;

u32 reg = readl(&anatop->reg_core);

/* bypass VDDARM/VDDSOC */

reg = reg | (0x1F << 18) | 0x1F;<-- PMU_REG_CORE's reg_arm & reg_soc

values are set to 0x1F

writel(reg, &anatop->reg_core);

}

Thank you,

Regards,

Ansari

[igorpadykov]

Hi Abdul

yes correct, during the LDO bypass

the "reg_pu" value is not set to 0x1F as given below

file:u-boot-imx/arch/arm/cpu/armv7/mx6/soc.c

because VDDPU is disabled in Uboot :

ENGR00264076-5 i.mx6:shutdown vddpu and pcie phy to save power

ENGR00264076-5 i.mx6:shutdown vddpu and pcie phy to save power · 4bd0032 · ajayramaswamy/u-boot-gk80...

LDO bypass code moved to kernel

ENGR00233366-5 Anatop PFUZE: move LDO bypass code to kernel - Gitorious

Best regards

chip

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------

[Ansari]

Hi Chip,

Thanks for your input on our query.

We understand that the  VDDPU will be disabled in the Uboot (to save the power) and it will remains disabled  until the kernel the enabling it.

We are using linux-3.10.17 kernel for our development and our device tree is imx6q-sabresd.dtb

The imx6qdl-sabresd.dtsi file having below settings

&gpc {

.........

        fsl,ldo-bypass = <1>; /* use ldo-bypass, u-boot will check it and configure */

        fsl,wdog-reset = <2>; /* watchdog select of reset source */

        pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */

};

we would like to know,

1) In the linux kernel where the VDDPU power anatop register (reg_pu) will be bypassed/enabled?

2) In the case of LDO bypass mode, Is it recommended to bypass (reg_pu value = 0x1F) the VDDPU ?

Thank You,

Regards,

Ansari

[igorpadykov · Accepted solution]

Hi Abdul

1. you can check Chapter 22 Low-level Power Management (PM) Driver

i.MX_6_Linux_Reference_Manual.pdf L3.10.17_1.0.0_LINUX_DOCS

and for example below

http://git.yoctoproject.org/cgit/cgit.cgi/meta-fsl-arm/commit/?id=ea6848fca73128a3e39c4488145cb306e4...

2. yes

Best regards

chip

[nagendrasarma]

hi all,

thanks for help,

i am using 3.10.17 kernel , and the dtsi file as below,

&gpc {

        fsl,cpu_pupscr_sw2iso = <0xf>;

        fsl,cpu_pupscr_sw = <0xf>;

        fsl,cpu_pdnscr_iso2sw = <0x1>;

        fsl,cpu_pdnscr_iso = <0x1>;

        fsl,ldo-bypass = <1>; /* use ldo-bypass, u-boot will check it and configure */

        fsl,wdog-reset = <1>; /* watchdog select of reset source */

        pu-supply = <&reg_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */

};

the reboot command  is not working(not able to restart IMX6), it hangs at   "Rebooting... Restarting system."

some times, rebooting but hangs  at u-boot when kernel starts  "Starting kernel ..."

the reboot feature works with 3.0.35 kernel (same HW) but not in 3.10.17 , i am confused with LDO bypass mode

could you please help me what is missing ?

regards

nagendra

[Ansari]

Hi chip,

Thanks for your exact advise.

Thank You,

Regards,

Ansari