AnsweredAssumed Answered

Using i.MX6 to generate 125MHz reference clock for RGMII interface

Question asked by Dan Kessler on Aug 6, 2014
Latest reply on Sep 17, 2014 by Dan Kessler

Hello,

 

I designed a custom board using the i.MX6 (Dual) using the RGMII interface to a Marvell 88E1118R PHY.

I have connected the GPIO16 pin (R2) to the ENET_REF_CLK pin (V22) externally on the PCB and would like to configure the CPU to generate the 125MHz reference clock.

 

I have read that it is possible:

https://community.freescale.com/message/378081#378081

http://cache.freescale.com/files/32bit/doc/user_guide/IMX6DQ6SDLHDG.pdf?fasp=1&WT_TYPE=UsersGuides&WT_VENDOR=FREESCALE&WT_FILE_FORMAT=pdf&WT_ASSET=Documentation&fileExt=.pdf

 

To summarize what I have understood - in order to achieve this I should:

  • Set CCM_ANALOG_PLL_ENETn[1:0] to ‘11’ for 125MHz
  • Set IOMUXC_SW_MUX_CTL_PAD_GPIO16 “MUX MODE” to ‘010’ for ENET_REF_CLK alternate function ALT2
  • SET IOMUXC_SW_MUX_CTL_PAD_GPIO16 SION bit to ‘1’ – good practice.
  • Set IOMUXC_GPR1[21] to ‘1’ in order to get reference clock from ANATOP and output to GPIO16 PAD (R2)
  • Set IOMUXC_SW_PAD_CTL_PAD_GPIO16[7:6] "SPEED" to '10' or '11' (MEDIUM/MAXIMUM)
  • Set IOMUXC_SW_PAD_CTL_PAD_GPIO16[0] "SRE" to '1' (FAST Slew Rate)

 

Are my understandings correct?

Did I miss anything?


What should I set IOMUXC_ENET_REF_CLK_SELECT_INPUT to? Does it matter in the case of RGMII?

Outcomes