ATD and MSCAN for HCS12

[prog_ram]

Hi,

I have two questions please regarding the ATD and the MSCAN modules of HCS12.

ATD:

The maximum digital reading of an analog channel should correspond to the voltage value of Vref. for example, if we have 10bit resolution channel and the signal connected to it reads x volt, then the digital reading value d is:

d= x * (1023/Vref).

So, if Vref= 4.4V and x = 2.5v then d=511.

the point is that 1023 which is the digital max reading is converted from the value Vref. what is happening to me is that 1023 corresponds to 5V regardless of the value of Vref. so if I connected Vref to 4.4V reference, then the max digital value will be about 900. from my understanding, this shouldn't happen, and Vref is always corresponds to the digital value of 1023 (10bit resolution).

can anyone please tell me where is the mistake?

MSCAN:

In case we use the acceptance ID that accepts all messages (by setting the Mask to not mask any bits), can we check the ID of the received message in software?

in other words, let's say I want to receive all messages by not masking any acceptance ID and then check the Acceptance ID registers in the RX buffer upon receiving (using the interrupt routine) to see if the desired message was received, can we do that?

or we have to stick to the Acceptance ID and masks and once the message is received, its Acceptance registers in the RX buffer are all gone?

thank you a lot, and I really appreciate the help,

bye.

[Steve]

ATD - it sounds like the ATD reference is not set up properly. The reference (Vref) is the difference between VRH and VRL. You can configure the ATD to measure those levels (VRH and VRL) and give you a result. The potential difference between the ATD input and VRL will give you the ATD result.

Note that there are minimum and maximum values for VRH and VRL for correct operation and full accuracy - see the electrical characteristics for details.

MSCAN - The CAN message ID is stored as the first four bytes in the receive buffer. You can read these in the same way as you read any other part of the message. The acceptance registers are not changed in any way by a CAN message.

[prog_ram]

thanks Steve for the replay,

when I said Vref, I meant VrH

My VrL is connected to ground (board ground). Thus connecting VrH to 4.4V will result in 4.4V (theorically) voltage difference which represents the maximum value of the digital reading.  It shouldn't be a difficult thing to do so what's the problem?

thanks again.

[Steve]

Is VDDA >= VRH?

[prog_ram]

I am using Zener Diode to provide 4.1V on Vrh. so the answer is yes.

it's worth mentioning that when I connected the vrh directly to VDDA, it worked and gave me 1023 (10bit) for VDDA voltage on the ATD input.

thanks for answering.

[dog]

Not sure if this will solve your problem but I think VRH = 4.1V is lower than the device spec allows for with VDDX = 5V.

You don't say which S12 you are using but I seem to remember min VRH-VRL = 4.5V and accuracy not being guaranteed if this was not met - you might want to check the ATD electricals for your device.

dog 

[prog_ram]

Hello Dog,

I checked the electrical characterstics of the ATD of MC9S12DP512 MCU.

It says that the max value of Vrh=6v and min for Vrl=-0.3v.

usually there lots of application where the Vref=VrH-VrL is 2.5V.

In my case, I used a (4.1V) Zener diode along with a series resistor to limit the current. but as I explained, the max digital value is always 1023 regardless of the Vref value. where it should be 1023 for whatever Vref is.

thanks for the reply..

bye.

[dog]

I think what you are refering to is the Absolute Maximum Rating which is a stress rating only, these are the values you need to stay within not to damage the device.

You also need to observe the Operational Characteristics and especially the ATD Operational Characteristics sections in the spec. which specifiy the valid operational constraints for the ATD including the differential VREF limits and the constraints on the references and supplies to get accurate conversion.

Like I said, not sure the 4.1V is your only problem but checking you are operating within the operational spec is a good place to start from to help you work out what the real problem might be.  

You might also check out AN2428 & AN2429 from the Freescale web site.

dog

[prog_ram]

well, I am sure that connecting Vrh to 4.1V and Vrl to 0v won't be more harmful than connecting them to 5.12V and 0v respectively which is what I am doing now and what most of the freescale examples are.

I checked the Documents for the operational characteristics and I didn't see that there is something other than the fact that Vref should be less or equal VDD (5v).

but if you see that this might not be the only problem, please, could you explain what other problem might be?

thank you Dog.

bye.

[kef]

prog_ram,

If it helps, I can confirm that it's OK to have Vdda-Vssa=5V, Vrl=Vssa and Vrh=4V. I can't confirm if it works with DP512, but I had good results with other parts. Vrh < 4.5V is allowed, you are only warned that below 4.5V full accuracy isn't guaranteed. Oops, some parts have full accuracy at 4.5V and some at 4.75V (C family). I was using 4.096V reference without any problem.

Did you measure Vrh? Is it close to what do you expect?

Isn't it source impedance issue, did you always verify with scope there's proper Vinput voltage, no pulses at ADC sampling time? Isn't it DP512 Device Guide, Appendix A.2.2.3 Current Injection, case 2?

I hope it's not DP512 issue

Regards

[prog_ram]

Hello Kef, and thanks for replying.

Actually, it's kind of surprising for me to know that we have to use the full range (4.5V) differential voltage to get the accuracy we need. I have always thought that we can use 2.5V differential to get better accuracy for analog inputs with 2.5V max value.

in the Appendix that you referred to, it's clearly stated that the differential should be no less than 4.5V. In this case, yes I can't use the 4.1V reference any more.

As for the current injection due to reading multiple analog inputs, I didn't see such a problem and I think most of the impedance sources are within the range (less than 1K).

One last thing you may have a comment on is that when I used the 4.1V reference (Zener diode with series resistor to limit the current), there was significantly increase in the total current sucked by the board. with 4.5V reference I get about 90mA total current, and with 4.1V reference, I got 198mA !

thanks again.

bye.

[kef]

Regarding specified Min Vrh-Vrl. I remember i didn't like what our HW guy did (he used 4.096V reference instead of valid >=4.5V). But as I said design has no problems at all. Neither excessive Vrh current nor loss of ADC or Vref accuracy. Vref accuracy would degrade at ten times lower currents then you have. But again, didn't try it with DP512. D64 and C32 seem being OK with such discrepancy.

Don't you have a short between Vrh and VDDa? Did you measure the voltage at your 4.1V Zener? Something must passing the current from VDD to Vrh. It could be the board. It could be DP512 but only if DP512 design of Vrh circuit is different compared to other D-family members... Couldn't your DP512 get damaged?

Regards

Message Edited by kef on 2007-09-13 04:56 PM

[prog_ram]

Kef,

The Vrh is connected to VDDa which is connected ot VCC=5V (regulated).

I measured the Zener voltage and it was exactly 4.1V. The series resistor is limiting the current to about 1mA to operate the Zener diode.

As for the MCU getting damaged, I am using this MCU in a board that uses almost 90% of the MCU embedded modules (ATD, IIC, CAN, SCI, SPI, GIOP, BDM and the TIMERS) and I have no problems with it at all. when I made the Vref=5V (instead of 4.1v), there wasn't any extra current in the total current and everything went perfect.

I am not sure if this answered your question regarding the MCU damage as I had some questions on a damaged MCU (flash memory) and Freescale told me that it's possible to have the flash damaged and the MCU still work. I assume that this is not the case here.

I couldn't explain the increase in the total current when Vref<4.5V specially that the ATD inputs were not connected to any analog channels yet.

The MCU with this current increase worked fine and even the ATD worked fine, except that the max digital reading for an analog channel of (4.1V which is the same as Vref) was not 1023 (10bit), it was less (as if Vref=5V).

thanks Kef,

bye.

[dog]

The ATD on the S12DP512 is exactly the same as on the other S12D parts and I just tried this out on one and I didn't see any problems problem. As I changed VRH the result of a fixed input voltage changed proportionally as expected (and there was no unexpected Idd behaviour either) ....... so there is nothing generically wrong with the 9S12DP512.

Right now I'm suspicious that the zener/series resistor might be part of the problem as it is not going to be the best voltage source in the world and the ATD references on the S12 will take ~375uA each. You might want to try this with 4.1V from a low impedance voltage source (such as an bench supply, which is how I tried it) and see if it makes a difference.

As for if the ATD could be broken with the other 90% of the chip fully functional, this is easily possible. If the ATD pins have suffered ESD or current injection damage then it might only affect the ATD functionality (depends on how lucky (unlucky?) you are). Not saying that this is what has happened tho' just that it's not impossible.

cheers,

dog   

[prog_ram]

Hello Dog,

I took your suggestion and connected Vrh to external power supply to get the low impedance voltage source, and I got the same result. However, the thing that I want to ask you about is that I got 4.4V on the Vrh even when it's not connected to any voltage!

again, I disconnected Vrh from any voltage source and it still has 4.4V on it. is that normal?

if not, what would be the reason?

Now, for the analog readings, the point is not that they don't change proportionally with the analog value (because the do now, even with the 4.1V reference problem). the point is that when an analog input has a voltage value equal to the Vrh, the digital reading is not 1023 (10bit) unless the Vrh=5V. So, if Vrh=4.1V, then when the input is 4.1v the digital reading is not 1023 (10bit). this is the problem.

so, please could you check on the 4.4V on the Vrh when it's not connected to any voltage source, where is voltage come from?

thank you,

best regards,

[dog]

I see pretty much 0V.

4.4V looks suspiciously like a diode connection to 5V! There will be lots of internal diode structures including the ESD protection diodes on various IO and supply rails.

You might see if it works as you expect between 4.4V and 5V but my guess would be that it's broken in which case all bets are off and I'm out of here!

dog.

[prog_ram]

Hello Dog,
I would like to ask you, what would be the reason for a possible connection between one of the ESD diodes and the Vrh pin?

I measured analog input of 4.64V where Vref=Vrh=5.04V, and the reading was 940~939. I don't know if this is a good accuracy or not (10bit should give 0.005mV resolution).



I am still thinking of the requirements that the manuals state about being Vref>=4.45V (MC9S12DP512 Device Guide V01.25, Appendix A.2.1 (ADT Characteristics)).

Please give me your opinion..

thanks a lot for investigating..

bye.

[dog]

4.64 / (5.04/1024) = 942-943 and the typical absolute error is +/- 2 counts, max 3 - so would appear OK.

I wasn't pointing at the ESD diodes in particular, just mentioned them as an example that there are lots of internal diode structures and if there was electrical overstress damage then who's to say it didn't cause a short from the VRH rail to one of these structures. 

Like I said, the part I have does not clamp VRH.

dog.

[Steve]

I re-read your question again and maybe I'm picking you up wrongly...

When VRL is connected to ground then VRH is the full range of the ATD (within the electrical spec numbers)

So If VRH = 4.4V then If I apply 2.2V on an ATD input the value I get will be 512 (approx).

If I apply 4.4V or anythig greater (within spec) I will get 1023 (roughly)

If I apply 0V I will get 0 (roughly)

If I apply 3V I will get 698 (roughly)

Does that help?

[prog_ram]

well, steve, this is how I also understand it. but what's happening is:

Vrl connected to ground (0V).

if Vrh = 4.4V and I apply ch1=4.4V then it's NOT 1023 (10bit), rather it's 900 (approx), which means that 1023 value is for 5V not for 4.4V (the value of Vrh) !!!

and even if I increased the ch1 input voltage up over than the vdda (within spec. ranges) value, it's still giving me the 900.

And again, the ATD works fine when Vrh is connected to VDDA=5V.

!!!

here is the ATD setup,

ATD0DIEN.byte= 0x00; 
ATD0CTL2.byte=0b11000000; // power up and fast clear

ATD0CTL3.byte= 0b00100000;

ATD0CTL4.byte = 0b00000011;

for reading:

ATD0CTL5.byte=0b10110000;
while (!(ATD0STAT0.byte&0x80));
  input[0] = ATD0DR0;
  input[1] = ATD0DR1;
  input[2] = ATD0DR2;
  input[3] = ATD0DR3;

any idea?

thank you Steve,

[Steve]

I can't think of anything else to check. Maybe someone else has seen this before and has an idea.