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i.MX6 VDD_SNVS_IN input voltage levels

Question asked by Martin Schad on Jul 2, 2014
Latest reply on Jul 2, 2014 by igorpadykov



I have a theoretical question related to the VDD_SNVS_IN maximum input voltage level.


Wandboard and Sabre Lite designs connect VDD_HIGH_IN and VDD_SNVS_IN inputs together and supply

both from a regulator 3.3V (±2%) rail without problems. This is a straightforward solution if the coincell

features of the iMX6 (or the PCMIC MMPF0100) are not needed.


Standard 3.3V power supplies have an output tolerance of about ±2% (ATX specifies ±5% for the 3.3V rail).

Therefore the VDD_SNVS_IN pin may "see" up to 3.465V (for 5% tolerance) or 3.366V (for 2% tolerance)

under worst case conditions when connected to a "typical" 3.3V rail.


But the iMX6 Solo/Dual Lite Data sheet specifies the following absolute maximum ratings:

- VDD_HIGH_IN input voltage: 3.6V

- VDD_SNVS_IN input voltage: 3.3V


Because the Sabre Lite and Wandboard solutions are working, I have the following question:


Can VDD_SNVS_IN input withstand 3.465V (if and only if it is connected to the VDD_HIGH_IN pin)

or is it required to keep the 3.3V rail below 3.3V under all circumstances, which means that we in fact need

a 3.0V...3.2V power source to supply VDD_SNVS_IN and VDD_HIGH_IN input pair ?


I don't understand the reason why the VDD_SNVS_IN input can tolerate 3.3V only while the VDD_HIGH_IN

input can tolerate up to 3.6V. They are internally connected with a bypass. Has this something to do with

the coincell charger electronics inside the iMX6 ?