when investigating the contents of the DDRMC registers of MVF61NS151 (2N02G), I found unclear and possibly erroneous parts in the reference manual.
I found that the register DDRMC_CR115 (located at address 0x400AE1CC) is set to value 0x20200000 (using md command in u-boot). In the RM (rev.5) I found that bits 31-8 are reserved, always having value of 0, while only bits 7-0 are dedicated to a field called RDLVL_GTDL_2. As this explanation collides with my observation (non-zero value in the reserved field), I thought it was a bug in the RM and downloaded the latest revision (rev.7). There it is even more ambiguous though, saying that all bits of the register are reserved: "This field is reserved. Disabled featuredSet to 0x0". I also found that this "description" in the RM rev.7 replaced lot more registers, which were somehow (don't know whether correctly) described in RM rev.5.
Can someone please explain why the descriptions changed this way and what is the meaning of the value 0x20200000 in DDRMC_CR115 which I am observing?