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MMA8652FC 3-axis accel - need timing diagram for single byte read and single byte write

Question asked by Tony Barry on May 23, 2014
Latest reply on Jun 2, 2014 by Tomas Vaverka

Hi People,

 

Mods, if this is not in the right place for Freescale Forums, please advise and I will move to the location you specify.

 

I am using the above mentioned accel for an upcoming project.  The part is (just) small enough to do the job and I like the digital interface.

 

But so far I am having trouble with comms to the device.  I have worked through the docs and there are ambiguities in them (e.g. section 5.11.1 Single Byte Read - NAK is shown in the timing diagram but the text implies there is no NAK ("…The Master does not acknowledge (NAK) the transmitted data …".

 

What I am after is the timing diagram for a single byte read and an single byte write.  Ideally with a reg address on 0x0D (the Who-Am-I reg) for the Read, and a reg address of 0x2A (the Control Reg 1) for the Write.

 

This could be a screen grab off a scope, or something else showing the transitions and the originators of the transitions (i.e. master, slave).

 

Regards,

Tony Barry

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