USB Support on P4080DS ?

[yasirkhan]

Hi,
I am unable to use USB device on P4080DS using images generated from FSL SDK 1.5 both in uboot and after the kernel boots up. Below is the log. Any help would be much appreciated.

Board info
==========
CPU0:  P4080E, Version: 3.0, (0x82080030)
Core:  E500MC, Version: 3.1, (0x80230031)

Linux
=====

Poky 9.0 (Yocto Project 1.4 Reference Distro) 1.4.1 p4080ds ttyS0

p4080ds login: root
root@p4080ds:~#
root@p4080ds:~# lsusb
Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
root@p4080ds:~#

u-boot
======

=> setenv hwconfig 'usb1:dr_mode=host,phy_type=ulpi'
=> usb start                                       
(Re)start USB...
USB0:   USB EHCI 1.00
scanning bus 0 for devices... 1 USB Device(s) found
USB1:   WARNING: USB phy type not defined !!
lowlevel init failed
       scanning usb for storage devices... 0 Storage Device(s) found
=>
=> setenv hwconfig 'usb1:dr_mode=host,phy_type=ulpi;usb2:dr_mode=host,phy_type=ulpi'
=> usb start                                                                       
(Re)start USB...
USB0:   USB EHCI 1.00
scanning bus 0 for devices... 1 USB Device(s) found
USB1:   USB PHY clock invalid!
lowlevel init failed
       scanning usb for storage devices... 0 Storage Device(s) found
=>

[yipingwang]

Please refer to the following EC2 field(363-365) of RCW in P4080RM, this filed needs to be configured as "100" for USB2 Host/Device enabling.

000 Frame Manager 2 dTSEC1 RGMII.

001 Reserved

010 Frame Manager 1 dTSEC2 RGMII

011 Reserved

100 USB 2 Host/Device

101-110 Reserved

111 No parallel mode Ethernet, no USB

NOTE: If SGMII mode is to be used (with the

appropriate SerDes lane powered on in

SRDS_LPDn) for FM2-dTSEC1 or FM1-

dTSEC2, then RGMII mode for that dTSEC

must not be enabled in EC2. However, if

RGMII is to be used by FM2-dTSEC1 or

FM1-dTSEC2 and EC2 is set accordingly,

then SGMII mode must not be enabled for

FM2-dTSEC1 or FM1-dTSEC2 (and the

corresponding SerDes lane must be

powered down in SRDS_LPD_Bn if SGMII

is selected for that bank n in the

SRDS_PRTCL setting).

Have a great day,
Yiping Wang

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[yasirkhan]

Thank you for your response. I have tried enabling USB2 mode by changing EC2 field to 100 but still unable to use USB mass storage device. The boot log shows that corresponding bits of RCW i.e. EC2 field has been set appropriately (00936000) but still the USB device doesn't get powered up and I am unable to get it detected. Is there any other hardware configuration to enable USB support apart from changing the RCW register or am I missing something? Kindly help in this regard. Below is the log:

U-Boot 2013.012014.05+snapshot (Apr 02 2014 - 13:13:05)

CPU0:  P4080E, Version: 3.0, (0x82080030)
Core:  E500MC, Version: 3.1, (0x80230031)
Clock Configuration:
       CPU0:1499.985 MHz, CPU1:1499.985 MHz, CPU2:1499.985 MHz, CPU3:1499.985 MHz,
       CPU4:1499.985 MHz, CPU5:1499.985 MHz, CPU6:1499.985 MHz, CPU7:1499.985 MHz,
       CCB:799.992 MHz,
       DDR:649.994 MHz (1299.987 MT/s data rate) (Asynchronous), LBC:99.999 MHz
       FMAN1: 599.994 MHz
       FMAN2: 599.994 MHz
       QMAN:  399.996 MHz
       PME:   599.994 MHz
L1:    D-cache 32 kB enabled
       I-cache 32 kB enabled
Reset Configuration Word (RCW):
       00000000: 105a0000 00000000 1e1e181e 0000cccc
       00000010: 3842440c 3c3c2000 de800000 e1000000
       00000020: 00000000 00000000 00000000 00936000
       00000030: 00000000 00000000 00000000 00000000
Board: P4080DS, Sys ID: 0x17, Sys Ver: 0x01, FPGA Ver: 0x0c, vBank: 4
SERDES Reference Clocks: Bank1=100MHz Bank2=125MHz Bank3=125MHz
I2C:   ready
SPI:   ready
DRAM:  Initializing....using SPD
Detected UDIMM HMT125U7BFR8C-H9 
Detected UDIMM HMT125U7BFR8C-H9 
2 GiB left unmapped
4 GiB (DDR3, 64-bit, CL=9, ECC on)
       DDR Controller Interleaving Mode: cache line
       DDR Chip-Select Interleaving Mode: CS0+CS1
Testing 0x00000000 - 0x7fffffff
Testing 0x80000000 - 0xffffffff
Remap DDR 2 GiB left unmapped

POST memory PASSED
Flash: 128 MiB
L2:    128 KB enabled
Corenet Platform Cache: 2048 KB enabled
SERDES: bank 2 disabled
SRIO1: disabled
SRIO2: disabled
MMC:  FSL_SDHC: 0
EEPROM: Invalid ID (ff ff ff ff)
PCIe1: Root Complex, no link, regs @ 0xfe200000
PCIe1: Bus 00 - 00
PCIe2: disabled
PCIe3: Root Complex, x1, regs @ 0xfe202000
  02:00.0     - 1095:3132 - Mass storage controller
PCIe3: Bus 01 - 02
In:    serial
Out:   serial
Err:   serial
Net:   Fman1: Uploading microcode version 106.2.11
PHY reset timed out
Fman2: Uploading microcode version 106.2.11
FM1@TGEC1, FM2@DTSEC3, FM2@DTSEC4
Hit any key to stop autoboot:  0
=>
=>
=> setenv hwconfig 'usb1:dr_mode=host,phy_type=ulpi'     
=> usb start
(Re)start USB...
USB0:   USB EHCI 1.00
scanning bus 0 for devices... 1 USB Device(s) found
USB1:   WARNING: USB phy type not defined !!
lowlevel init failed
       scanning usb for storage devices... 0 Storage Device(s) found
=> usb tree
USB device tree:
  1  Hub (480 Mb/s, 0mA)
     u-boot EHCI Host Controller
  
=> usb storage
No storage devices, perhaps not 'usb start'ed..?
=>

[yasirkhan]

I haven't been able to solve the problem yet. Any help would be much appreciated. Thanks

[yipingwang]

P4080 SoC has two USB controllers, but only one is used on P4080DS platform. U-boot trying to initialize both USB controllers, whereas second one is not getting clk from external phy.

Please also apply to the attached patch over SDK 1.5 form the Linux SDK development team.

Have a great day,
Yiping Wang

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[yipingwang]

Please check whether it would be helpful to add hwconfig as the following.

=>setenv hwconfig 'usb2:dr_mode=host,phy_type=ulpi;usb1:dr_mode=host, phy_type=ulpi'

=>saveenv

=>reset

Have a great day,
Yiping Wang

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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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[Wlodek_D_]

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