I am using Cortex A8 CPU (iMX53) on my board and am trying to map external SDRAM with address space 0x7000_0000 to 0x7FFF_FFFF using 16M supersections. The MMU descriptor table is of size 256 words (each entry in the table being 0x7005_1C0E, 0x7105_1C0E,.... 0x7F05_1C0E) is placed in the on-chip RAM at 0xF801_8000. Since supersections are being used, each descriptor is repeated 16 times in the table - hence the size of the table is 256 words.
TTBCR.N is 0 as I want to use L1 page table only
TTBR0 contains the same address which is 0xF801_8000.
When I enable the MMU by writing to the coprocessor, I get a prefetch abort. The code which sets up the MMU table and disables/enables cache and MMU is also running out of OnChip RAM
Can someone help me figure out what I am missing.