I am currently using a Micron LPDDR2 (MT42L32M16D1) part. I have it configured and have been able to run a memory test executing from internal SRAM that can write and read from the LPDDR2 memory without any errors. When I go to execute out of the LPDDR2, I am receiving errors(chip is going off into the weeds) upon execution of any instruction that utilizes the stack(push, bl, etc.). If I adjust the TBST_INT_INTERVAL from 2 to 4, I am able to use a debugger and step through these instructions without error, but if I attempt to run without stepping, I see the crash again. Adjusting the interval more in either direction does not help (if anything makes it worse). Any idea which DRAM configurations/settings would be causing this problem? Thanks.