MC9S08DZ16 hardware doubt on the ADC VddA

[diegoconsolaro]

Hi Community,

I have a hardware question.

In my application i want to sample a signal from hall effect sensor in the windows from 0.5V to 4.5V.

To improve the fidelity of the ADC i want to compress the dynamics of the ADC, and put the Vref @ 4.8V. My question is: My connection in the attached document is right? Or a voltage resistor divider is better?

Thanks to  everybody in advance for our reply.

Best Regards

[kef2]

You want to lower Vdda, not Vref, right? This would violate ADC Supply voltage Delta to Vdd! See Table A-9.

[diegoconsolaro]

Hi Edward,

yes! If my calculations are correct my configuration should be good.

As i see in the table A-9 of the datasheet the admited VddA is between 2.7 -5.5V with a Delta to Vdd between -0.1 < Vdd < 0.1V.

The formula to found  Delta V is: (VDD-VDDAD)^2 then in my case: (5.00-4.8)^2 = 0.04V that is the admitted range.

What you think?

Thank you!

Diego

[kef2]

(VDD-VDDAD)^{2 would give (mV)}2 units. And you see just millivolts...

[diegoconsolaro]

Sorry Edward,

i don't understand. if i use the Vdd and VDDAD in mV the result of square elevation  is mV^2 ...

Can you give me an example?

Thanks

[kef2]

I replied to your previous message via email. Community engine sometimes faills sending from browser, sometimes from email.

I meant that if delta-Vdda-to-Vdd was calculated as you specified  (VDD-VDDAD)^2, then specified limits had to be specified in square millivolts units, not in millivolts. Also there could be no negative limit for this. I don't know exactly what authors of S08DZ datasheet meant, maybe they meant RMS or somethibg, but delta is still specified in mV units.

[diegoconsolaro]

Ok, I have too many doubts. For safety I put the VDDA to 5V.

Thank you very much for your support Edward!

Best Regards.

Diego