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P4080: CoreNet Coherency Fabric and Arbitration details?

Question asked by Ankit Agrawal on Aug 12, 2013
Latest reply on Aug 13, 2013 by Ankit Agrawal

Case: Say, all the 8 cores in P4080 result in L1 and L2 cache miss at the same time, leading to Main memory read request with all read requests having the same timestamp

 

Question: How does the CoreNet Coherency fabric order arbitrate/order the requests(having the same timestamp)?
              
Could someone please guide me to the right document about CoreNet Fabric and arbitration w.r.t. Memory Controller. I could not find one.

 

Thanks

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