[sdhci_pre_dma_transfer] invalid cookie

[kal]

Is anyone else getting quite a few of these messages in dmesg?

[sdhci_pre_dma_transfer] invalid cookie: data->host_cookie 85557 host->next_data.cookie 85558

I get one of these messages every minute or so. Running Ubuntu 4.0.0 release from SD card. For what it's worth, I'm using the Boundary 4.0.0 kernel.

Many thanks.

[wallyyeh]

I found a irc log:

http://irclog.whitequark.org/imx6-dongle/2013-03-23

there's brief explanation about these kernel messages in the irc log:

10:31 <hste> abrasive_: Do u know what this is: [sdhci_pre_dma_transfer] invalid cookie: data->host_cookie 4750 host->next_data.cookie 4751
10:50 <abrasive_> dropped a transfer. no biggie if it keeps working.

[huang_dexiang]

Does it mean that the transfer data which was dropped will be lost?

[wallyyeh]

I believe it will retry 'till the transfer success. or system may just hang.

[huang_dexiang]

so if my application is to receive data from net using UDP, if the message occurs, the system hang, and we will lost data from net?

[wallyyeh]

this function is provide by freescale, here is the comment:

/***************************************************************************************************/

ENGR00219601-02: mmc: sdhci: revise pre_req & post_req to improve performance

Test Env:

1. MX6DL SabreSD board.

2. On board eMMC (Sandisk: SDIN5C2-8G) running at 8-bit DDR @ 52MHz.

3. Test commands:

  3.1 Writing command:

  # dd if=/dev/zero of=/dev/mmcblk0 bs=1M count=100 conv=fsync

  3.2 Reading command:

  # echo 1 > /proc/sys/vm/drop_caches

  # echo 1 > /proc/sys/vm/drop_caches

  # sleep 1

  # dd if=/dev/mmcblk0 of=/dev/null bs=1M count=100

Performance result with this patch:

-------------------------------------------------------

| CPU freq | SDMA (512KB) | SDMA (64KB) |    ADMA     |

|----------+--------------+-------------+-------------|

|   1Ghz   |  ~11MB/s (w) | ~5MB/s (w)  | ~11MB/s (w) |

|          |  ~25MB/s (r) | ~25MB/s (r) | ~23MB/s (r) |

|----------+--------------+-------------+-------------|

|  200Mhz  |  ~8MB/s (w)  | ~5MB/s (w)  | ~9MB/s (w)  |

|          |  ~16MB/s (r) | ~20MB/s (r) | ~13MB/s (r) |

-------------------------------------------------------

Performance result without this patch:

-------------------------------------------------------

| CPU freq | SDMA (512KB) | SDMA (64KB) |    ADMA     |

|----------+--------------+-------------+-------------|

|   1Ghz   |  ~10MB/s (w) | ~5MB/s (w)  | ~10MB/s (w) |

|          |  ~22MB/s (r) | ~23MB/s (r) | ~22MB/s (r) |

|----------+--------------+-------------+-------------|

|  200Mhz  |  ~8MB/s (w)  | ~4MB/s (w)  | ~8MB/s (w)  |

|          |  ~13MB/s (r) | ~16MB/s (r) | ~11MB/s (r) |

-------------------------------------------------------

Signed-off-by: Ryan QIAN <b32804@freescale.com>

/***************************************************************************************************/

So I think this just speed up eMMC *read* performance not write's.

and this message is to warn you that the date *read* form(not wirte to) eMMC meets an error.

[wallyyeh]

my fault, it also improve write speed.

so you may lost data when it meets error I think.

maybe you want reverse the patch and test again.