I am looking at the SDHC_LDD component and the code generated by processor expert. It looks like the code does not enable the command index check (CICEN) and the CRC check (CCCEN) supported internally by the SDHC controller, i.e. the enable bits in the SDHC_XFERTYP register are not set. Is there any special reason for this?
Looks like in C:\Freescale\CW MCU v10.4\MCU\ProcessorExpert\lib\Kinetis\pdd\inc\SDHC_PDD.h the definitions for the checks exist:
/* Command CRC check */
#define SDHC_PDD_ENABLE_CRC_CHECK SDHC_XFERTYP_CCCEN_MASK /**< Enable CRC check. */
#define SDHC_PDD_DISABLE_CRC_CHECK 0U /**< Disable CRC check. */
/* Command index check */
#define SDHC_PDD_ENABLE_INDEX_CHECK SDHC_XFERTYP_CICEN_MASK /**< Enable index check. */
#define SDHC_PDD_DISABLE_INDEX_CHECK 0U /**< Disable index check. */
But when I look at Transfer() in SDHC.c these check parameters are not passed for some reason I do not understand. Why is this???