625k baud rate with S08

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625k baud rate with S08

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IlConte
Contributor IV

I need to comunicate by serial interface SCI at 625K of baud rate with 5V MCU.

I know the S08 processor and I have see the MP16 family

I can work at baud rate 625k with this processor, using a exteral quarz of 51 MHz ?

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Joel69003
Contributor IV

Hi Stefano,

I tried in the past at 250k of baud rate with an S08 MCU, and even at this rate, you are spending a lot of time executing the interrupt to handle your data. Thus, the performance of the other parts of the application are affected. I think 625k can't be imagine with an S08 device.

To achieve this kind of baud rate I recommend you to look after Kinetis KL04/KL05 which are really efficient. Moreover they have DMA which can be interesting for you to not spent to much time executing you interrupt code.

Regards,

Joel

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bigmac
Specialist III

Hello,

Further to the comment by Tony P, the maximum allowable crystal frequency is 16 MHz - to achieve an external input frequency of 40 MHz, you would need to use an oscillator module having a square wave output.

I assume that you were intending to use FBE mode, to give a CPU clock of 40MHz, and a bus clock of 20MHz.  However, it is also feasible to achieve the same CPU and bus frequencies using a lower frequency crystal (FEE mode), or using the trimmed internal reference (FEI mode).

For FEE mode, the crystal frequency would need to be a "power of two" multiple of 39.0625 kHz.  A crystal frequency of 5.0MHz or 10.0MHz would be suitable.

For FEI mode, the internal reference would need to be trimmed to a frequency of 39.0625 kHz.  The stability of the internal reference should be adequate for normal SCI operation.

For a baud rate of 625k, the transmission period will be 16 microseconds per byte.  For a 40MHz CPU bus, this corresponds to 640 cycles.  The processing time for the handling of each received byte must not exceed this value, otherwise overrun errors will occur, and data will be lost.  It also means that all other interrupts would most likely need to be disabled during the SCI receive process.

Regards,

Mac


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tonyp
Senior Contributor II

I think the SCI uses a 16x clock divider, so you would need a bus multiple of 10MHz (20MHz multiple for external crystal), so the highest allowed, without going over the max, would be 40MHz (external).  (Whether or not you can have sustained comms at this rate, however, depends very much on your coding.)

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