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Device tree modifications for PCIe on P2041

Question asked by Matthew Hornbeck on Feb 12, 2013
Latest reply on Feb 13, 2013 by Scott Wood

I'm trying to modify the p2041rdb.dts file to allow for a PCIe device with a very large memory mapped footprint (2GBytes).

 

I've changed the device tree entries as follows, but cannot get the Linux SDK V1.3 kernel to boot with the resulting device tree :

 

     .....

 

         rio: rapidio@ffe0c0000 {

                 reg = <0xf 0xfe0c0000 0 0x11000>;

 

                 port1 {

                         ranges = <0 0 0xc 0xc0000000 0 0x10000000>;

                 };

                 port2 {

                         ranges = <0 0 0xc 0xd0000000 0 0x10000000>;

                 };

         };

 

     .....

 

         pci0: pcie@ffe200000 {

                 reg = <0xf 0xfe200000 0 0x1000>;

                 ranges = <0x02000000 0 0x80000000 0xc 0x00000000 0x0 0x80000000

                           0x01000000 0 0x00000000 0xf 0xf8000000 0x0

0x00010000>;

                 pcie@0 {

                         ranges = <0x02000000 0 0x80000000

                                   0x02000000 0 0x80000000

                                   0 0x80000000

 

                                   0x01000000 0 0x00000000

                                   0x01000000 0 0x00000000

                                   0 0x00010000>;

                 };

         };

 

         pci1: pcie@ffe201000 {

                 reg = <0xf 0xfe201000 0 0x1000>;

                 ranges = <0x02000000 0x0 0xe0000000 0xc 0x80000000 0x0

0x20000000

                           0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0

0x00010000>;

                 pcie@0 {

                         ranges = <0x02000000 0 0xe0000000

                                   0x02000000 0 0xe0000000

                                   0 0x20000000

 

                                   0x01000000 0 0x00000000

                                   0x01000000 0 0x00000000

                                   0 0x00010000>;

                 };

         };

 

         pci2: pcie@ffe202000 {

                 reg = <0xf 0xfe202000 0 0x1000>;

                 ranges = <0x02000000 0 0xe0000000 0xc 0xa0000000 0 0x20000000

                           0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;

                 pcie@0 {

                         ranges = <0x02000000 0 0xe0000000

                                   0x02000000 0 0xe0000000

                                   0 0x20000000

 

                                   0x01000000 0 0x00000000

                                   0x01000000 0 0x00000000

                                   0 0x00010000>;

                 };

         };

 

     .....

 

    Any suggestions on how to get this to work?


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