AnsweredAssumed Answered

Getting zeros on i.MX6 PMU counters

Question asked by Mickey I on Dec 13, 2012
Latest reply on Jan 11, 2017 by Michal Risa
Branched to a new discussion

Hi.

 

I'm running the i.MX6, and I get zeroed out PMU counters. The indication comes from ARM DS-5's Streamline, this is the message I see:

 

ARM Processor PMU event counters have been detected, however the event counters are reading zeroes. Event counters include those counters listed in the counter configuration options dialog under the core name but exclude the cycle counter (Clock:Cycles) as it is controlled by a dedicated counter. It is possible that the PMU configuration bit DBGEN has not been enabled, and counter values subsequently will always read as zero. To remedy, please update your firmware or Linux kernel to enable DBGEN.

 

I've tried sampling CPU events on LTIB releases 3.0.15 and 3.0.35. Linaro version 12.05 has been also tried but the counters are still zeroed out.

I'm using a SabreLite board, and DS-5/gator version 5.11.

 

Can any one successfully read CPU events from i.MX6 using Streamline?

 

Thanks,

Mickey.

 

 

 

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